OR4E02-2BA352I datasheet(17/152 Pages) LATTICE

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Lattice Semiconductor

Data Sheet

May, 2006

ORCA Series 4 FPGAs

Programmable Logic Cells (continued)

In the third submode, multiplier submode, a single

PFU can affect an 8x1 bit (4x1 for half-ripple mode)

multiply and sum with a partial product (see Figure 11).

The multiplier bit is input at F5[A:C], respectively per

nibble, and the multiplicand bits are input at KZ[1],

where K7[1] is the most signiﬁcant bit (MSB). KZ[0] con-

tains the partial product (or other input to be summed)

from a previous stage. If F5[A:C] is logical 1, the multi-

plicand is added to the partial product. If F5[A:C] is log-

ical 0, 0 is added to the partial product, which is the

same as passing the partial product. CIN/FCIN can

bring the carry-in from the less signiﬁcant PFUs if the

multiplicand is wider than 8 bits, and COUT/FCOUT

holds any carry-out from the multiplication, which may

then be used as part of the product or routed to another

PFU in multiplier mode for multiplicand width expan-

sion.

Ripple mode’s fourth submode features equality

comparators.

The functions that are explicitly available

are A ≥ B, A

≠ B, and A ≤ B, where the value for A is

input on KZ[0], and the value for B is input on KZ[1]. A

value of 1 on the carry-out signals valid argument. For

example, a carry-out equal to 1 in AB submode indi-

cates that the value on KZ[0] is greater than or equal to

the value on KZ[1]. Conversely, the functions A ≤ B,

A + B, and A > B are available using the same func-

tions but with a 0 output expected. For example, A

> B

with a 0 output indicates A ≤ B. Table 4 shows each

function and the output expected.

If larger than 8 bits, the carry-out signal can be cas-

caded using fast-carry logic to the carry-in of any adja-

cent PFU. The use of this submode could be shown

using Figure 9, except that the CIN/FCIN input for the

least signiﬁcant PFU is controlled via conﬁguration.

Table 4. Ripple Mode Equality Comparator

Functions and Outputs

5-5757(F)

Key: C = conﬁguration data.

Note: F5[A:C] shorted together

Figure 11. Multiplier Submode

Equality

Function

ispLEVER

Submode

True, if

Carry-Out Is:

A ≥ BA ≥ B1

A ≤ BA ≤ B1

A ≠ BA ≠ B1

A < B

A ≥ B0

A > B

A ≤ B0

A = B

A ≠ B0

K7[1]

K7[0]

F5[A:C]

K4[1]

K4[0]

K3[1]

K3[0]

K2[1]

K2[0]

K1[1]

K1[0]

K6[1]

K6[0]

K5[1]

K5[0]

K0[1]

K0[0]

COUT

REGCOUT

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