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13191 Datasheet(PDF) 13 Page - Freescale Semiconductor, Inc |
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13191 Datasheet(HTML) 13 Page - Freescale Semiconductor, Inc |
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13 / 24 page ![]() MC13191 Technical Data, Rev. 1.6 Freescale Semiconductor 13 8 GPIO41 Digital Input/ Output General Purpose Input/Output 4. See Footnote 1 9 GPIO31 Digital Input/ Output General Purpose Input/Output 3. See Footnote 1 10 GPIO21 Digital Input/ Output General Purpose Input/Output 2. When gpio_alt_en, Register 9, Bit 7 = 1, GPIO2 functions as a “CRC Valid” indicator. See Footnote 1 11 GPIO11 Digital Input/ Output General Purpose Input/Output 1. When gpio_alt_en, Register 9, Bit 7 = 1, GPIO1 functions as an “Out of Idle” indicator. See Footnote 1 12 RST Digital Input Active Low Reset. While held low, the IC is in Off Mode and all internal information is lost from RAM and SPI registers. When high, IC goes to IDLE Mode, with SPI in default state. 13 RXTXEN2 Digital Input Active High. Low to high transition initiates RX or TX sequence depending on SPI setting. Should be taken high after SPI programming to start RX or TX sequence and should be held high through the sequence. After sequence is complete, return RXTXEN to low. When held low, forces Idle Mode. See Footnote 2 14 ATTN2 Digital Input Active Low Attention. Transitions IC from either Hibernate or Doze Modes to Idle. See Footnote 2 15 CLKO Digital Output Clock output to host MCU. Programmable frequencies of: 16 MHz, 8 MHz, 4 MHz, 2 MHz, 1 MHz, 62.5 kHz, 32.786+ kHz (default), and 16.393+ kHz. 16 SPICLK2 Digital Clock Input External clock input for the SPI interface. See Footnote 2 17 MOSI2 Digital Input Master Out/Slave In. Dedicated SPI data input. See Footnote 2 18 MISO3 Digital Output Master In/Slave Out. Dedicated SPI data output. See Footnote 3 19 CE2 Digital Input Active Low Chip Enable. Enables SPI transfers. See Footnote 2 20 IRQ Digital Output Active Low Interrupt Request. Open drain device. Programmable 40 kΩ internal pull-up. Interrupt can be serviced every 6 µs with <20 pF load. Optional external pull-up must be >4 kΩ. 21 VDDD Power Output Digital regulated supply bypass. Decouple to ground. 22 VDDINT Power Input Digital interface supply & digital regulator input. Connect to Battery. 2.0 to 3.4 V. Decouple to ground. 23 GPIO51 Digital Input/Output General Purpose Input/Output 5. See Footnote 1 24 GPIO61 Digital Input/Output General Purpose Input/Output 6. See Footnote 1 25 GPIO71 Digital Input/Output General Purpose Input/Output 7. See Footnote 1 26 XTAL1 Input Crystal Reference oscillator input. Connect to 16 MHz crystal and load capacitor. Table 8. Pin Function Description (continued) Pin # Pin Name Type Description Functionality |
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