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HD49338HNP Datasheet(PDF) 21 Page - Renesas Technology Corp

Part # HD49338HNP
Description  CDS/PGA & 12-bit A/D Converter
PDF  23 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD49338HNP Datasheet(HTML) 21 Page - Renesas Technology Corp

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HD49338NP/HNP
Rev.2.00 May 20, 2005 page 21 of 22
Example of Recommended External Circuit
R11 100
R12 100
R13 100
R10 100
C20
0.1
C18
0.1
C19
0.1
C17
0.1
L1
47
µ
• At CDS Input
Notes: 1. For C4, see table 5.
2. For C3, see page 8 "DC Offset Compensation Feedback Function".
Unit: R:
Ω
C: F
23
26
27
28
29
30
31
32
33
34
C4*1
C14 0.1
R15 33 k
C15 0.1
35
36
25
11
10
9
8
7
6
5
4
3
2
1
12
16 15 14 13
17
18
19
20
21
22
24
38
45 46 47 48
44
43
42
41
40
39
37
Serial data input
GND
from
Timing generator
from CCD out
Note: External circuit is same as above except for ADC/Y input.
3.0 V
3.0 V
to
Camera
signal
processor
to
Camera
signal
processor
C21
0.1
C22
0.1
C20
0.1
C18
0.1
C19
0.1
C17
0.1
C21
0.1
C22
0.1
C13
0.1
C1
1
µ C3*
2 1
µ
C10
0.1
C11
0.1
C12
0.1
C11
0.1
C12
0.1
R15 33 k
C16
47/6
C21
47/6
L2
47
µ
R14 100
HD49338NP/HNP
(CDS/PGA+ADC)
L1
47
µ
• At ADC/Yin Input
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
AVSS
AVSS
AVDD
BLKSH
BLKFB
CDSIN
BLKC
BIAS
AVDD
Y IN
AVSS
ADCIN
23
26
27
28
29
30
31
32
33
34
C15 0.1
35
36
25
11
10
9
8
7
6
5
4
3
2
1
12
16 15 14 13
17
18
19
20
21
22
24
38
45 46 47 48
44
43
42
41
40
39
37
Serial data input
GND
from
Timing generator
C14 0.1
C13
0.1
C2 2.2/16
C16
47/6
C21
47/6
L2
47
µ
HD49338NP/HNP
(CDS/PGA+ADC)
C23 0.47
with Y input
AVSS
AVSS
AVDD
BLKSH
BLKFB
CDSIN
BLKC
BIAS
AVDD
Y IN
AVSS
ADCIN
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
with ADC input



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