M306V2EEFS datasheet(267/271 Pages) RENESAS

267 / 271 page

Rev.1.40

Oct 06, 2004 page 267 of 269

M306V2ME-XXXFP, M306V2EEFP

Structure of Register

Refer to the figure below as for each register.

Values immediately

after reset release

Bit attributes

(Note 1)

(Note 2)

Processor mode register 1 (Note)

SymbolAddressWhen reset

PM1000516

00000X002

Bit nameFunction

Bit symbol

b7b6b5b4b3b2b1b0

Nothing is assigned.

In an attempt to write to this bit, write “0.” The value, if read, turns out to be

indeterminate.

Reserved bit

Must always be set to “0”

PM17

Wait bit

0 : No wait state

1 : Wait state inserted

Reserved bits

Must always be set to “0”

: Bit in which nothing is assigned

2: Bit attributes••••••The attributes of control register bits are classified into 3 types : read-only,

write-only and read and write. In the figure, these attributes are represented

as follows :

Notes 1: Values immediately after reset release

0 ••••••••••••••••••“0” after reset release

1 ••••••••••••••••••“1” after reset release

? ••••••••••••••••••Indeterminate after reset release

✕••••••••••••••••••Bit in which nothing is assigned

••••••Read enabled

✕••••••Read disabled

••••••Bit in which nothing is assigned (The read value is indeterminate unless otherwise mentioned.)

R••••••Read

W••••••Write

••••••Write enabled

✕••••••Write disabled

••••••Bit in which nothing is assigned

Reserved bit

Must always be set to “1”

Note: As bit 1 of this register becomes “0” at reset, must always be set to “1” after reset

release. Set bit 1 of the protect register (address 000A16) to “1” when writing new

values to this register.

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