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HS4318ESS01H Datasheet(PDF) 12 Page - Renesas Technology Corp |
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HS4318ESS01H Datasheet(HTML) 12 Page - Renesas Technology Corp |
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12 / 68 page ![]() HD404318 Series 10 Table 1 Initial Values of Flags after MCU Reset Item Initial Value Interrupt flags/mask Interrupt enable flag (IE) 0 Interrupt request flag (IF) 0 Interrupt mask (IM) 1 Bit registers Watchdog timer on flag (WDON) 0 A/D start flag (ADSF) 0 Input capture status flag (ICSF) 0 Input capture error flag (ICEF) 0 I AD off flag (IAOF) 0 RAM enable flag (RAME) 0 Bit 3 Bit 2 Bit 1 Bit 0 IMTA (IM of timer A) IFTA (IF of timer A) IM1 (IM of INT1) IF1 (IF of INT1) IMTC (IM of timer C) IFTC (IF of timer C) IMTB (IM of timer B) IFTB (IF of timer B) IMS (IM of serial) IFS (IF of serial) IMAD (IM of A/D) IFAD (IF of A/D) $0000 $0001 $0002 $0003 Interrupt control bits area IM0 (IM of INT0) IF0 (IF of INT0) RSP (Reset SP bit) IE (Interrupt enable flag) ICSF (Input capture status flag) $020 $021 $022 $023 Register flag area ADSF (A/D start flag) WDON (Watchdog on flag) Not used ICEF (Input capture error flag) RAME (RAM enable flag) IF: Interrupt request flag IM: Interrupt mask IE: Interrupt enable flag SP: Stack pointer Bit 3 Bit 2 Bit 1 Bit 0 RAM Address IAOF (IAD off flag) Not used Not used Figure 3 Interrupt Control Bits and Register Flag Areas Configuration |
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