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R8C2K Datasheet(PDF) 379 Page - Renesas Technology Corp |
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R8C2K Datasheet(HTML) 379 Page - Renesas Technology Corp |
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379 / 471 page ![]() R8C/2K Group, R8C/2L Group 20. Flash Memory Rev.1.10 Dec 21, 2007 Page 362 of 450 REJ09B0406-0110 20. Flash Memory 20.1 Overview Rewrite operations to the flash memory can be performed in three modes : CPU rewrite, standard serial I/O, and parallel I/O. Table 20.1 lists the Flash Memory Version Performance (refer to Tables 1.1 and 1.4 Specifications for items not listed in Table 20.1). NOTES: 1. Definition of programming and erasure endurance. The programming and erasure endurance is defined on a per-block basis. 2. Blocks A and B (data flash) are included in the R8C/2L Group. Table 20.1 Flash Memory Version Performance Item Specification Flash memory operating modes 3 modes (CPU rewrite, standard serial I/O, and parallel I/O) Division of erase block Refer to Figures 20.1 and 20.2. Programming method Byte unit Erase method Block erase Programming and erasure control method Programming and erasure control by software command Suspend functions Program-suspend and erase-suspend Protection method Program ROM protection by FMR0 register Number of commands 5 commands Programming and erasure endurance(1) Blocks 0 and 1 (program ROM) R8C/2K Group: 100 times; R8C/2L Group: 1,000 times Blocks A and B (data flash)(2) 10,000 times Programming and erasure voltage VCC = 2.7 to 5.5 V ID code check function Standard serial I/O mode supported ROM code protect Parallel I/O mode supported Table 20.2 Flash Memory Rewrite Modes Flash Memory Rewrite Mode CPU Rewrite Mode Standard Serial I/O Mode Parallel I/O Mode Function User ROM area is rewritten by executing software commands from the CPU. User ROM area is rewritten by a dedicated serial programmer. User ROM area is rewritten by a dedicated parallel programmer. Rewritable areas User ROM area User ROM area User ROM area Rewrite programs User program Standard boot program – |
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