R8C2K datasheet(332/471 Pages) RENESAS

332 / 471 page

R8C/2K Group, R8C/2L Group

16. Timers

Rev.1.10

Dec 21, 2007

Page 315 of 450

REJ09B0406-0110

When the value in the buffer register is set to 0000h:

Transfer takes place at compare match between registers TRD0 and TRDGRA0.

After this, when the buffer register is set to 0001h or above and a smaller value than the value of the

TRDGRA0 register, and a compare match occurs between registers TRD0 and TRDGRA0 for the first time

after setting, the value is transferred to the general register. After that, the value is transferred with the

timing selected by bits CMD1 to CMD0.

Figure 16.150 Operation when Value in Buffer Register Is Set to 0000h in Complementary PWM

Mode

16.4.12.8 Count Source fOCO40M

• The count source fOCO40M can be used with supply voltage VCC = 3.0 to 5.5 V. For supply voltage other

than that, do not set bits TCK2 to TCK0 in registers TRDCR0 and TRDCR to 110b (select fOCO40M as

the count source).

0000h

TRDGRD0 register

TRDIOB0 output

m+1

0000h

TRDGRB0 register

Transfer

Transfer at compare

match between

registers TRD0 and

TRDGRA0 because

content in TRDGRD0

0000h.

Transfer at compare

match between

registers TRD0 and

TRDGRA0 because

of first setting to

0001h

≤ n1 < m

Transfer with timing

set by bits CMD1 to

CMD0

TRDIOD0 output

m: Value set in TRDGRA0 register

The above applies under the following conditions:

• Bits CMD1 to CMD0 in the TRDFCR register are set to 10b (data in the buffer register is transferred at underflow of the TRD1 register in

PWM mode).

• Both the OLS0 and OLS1 bits in the TRDFCR register are set to 1 (active “H” for normal-phase and counter-phase).

Count value in TRD0 register

Count value in TRD1 register

Transfer with timing

set by bits CMD1 to

CMD0

Transfer

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