R8C2K datasheet(333/471 Pages) RENESAS

333 / 471 page

R8C/2K Group, R8C/2L Group

17. Serial Interface

Rev.1.10

Dec 21, 2007

Page 316 of 450

REJ09B0406-0110

17. Serial Interface

The serial interface consists of two channels (UART0 or UART2). Each UARTi (i = 0 or 2) has an exclusive timer to

generate the transfer clock and operates independently.

Figure 17.1 shows a UARTi (i = 0 or 2) Block Diagram. Figure 17.2 shows a UARTi Transmit/Receive Unit.

UARTi has two modes: clock synchronous serial I/O mode and clock asynchronous serial I/O mode (UART mode).

Figures 17.3 to 17.5 show the Registers Associated with UARTi, and Figure 17.6 shows the PINSR1 Register.

Figure 17.1

UARTi (i = 0 or 2) Block Diagram

= 01b

= 10b

CLK1 to CLK0 = 00b

RXDi

f32

1/16

1/2

1/(n0+1)

UART reception

UART transmission

Clock synchronous type

(when internal clock is selected)

Clock

synchronous type

Reception control

circuit

Transmission

control circuit

CKDIR = 0

CKDIR = 1

Receive

clock

Transmit

clock

Transmit/

receive

unit

U0BRG register

CKDIR = 0

Internal

External

CKDIR = 1

UARTi

TXDi

CLK

polarity

switch

circuit

CLKi

Clock

synchronous type

Clock synchronous type

(when external clock is selected)

Clock synchronous type

(when internal clock is selected)

i = 0 or 2

CKDIR: Bit in UiMR register

CLK0 to CLK1: Bits in UiC0 register

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