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R8C2K Datasheet(PDF) 337 Page - Renesas Technology Corp |
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R8C2K Datasheet(HTML) 337 Page - Renesas Technology Corp |
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337 / 471 page ![]() R8C/2K Group, R8C/2L Group 17. Serial Interface Rev.1.10 Dec 21, 2007 Page 320 of 450 REJ09B0406-0110 Figure 17.5 Registers U0C1, U2C1 and U0RB, U2RB UARTi Transmit/Receive Control Register 1 (i = 0 or 2) Symbol Address After Reset U0C1 00A5h 00000010b U2C1 0165h 00000010b Bit Symbol Bit Name Function RW NOTES: 1. 2. — (b6) Reserved bit Set to 0. RW b0 Nothing is assigned. If necessary, set to 0. When read, the content is 0. Transmit enable bit 0 : Disables transmission 1 : Enables transmission Transmit buffer empty flag 0 : Disables reception 1 : Enables reception UiIRS b3 b2 b1 — Receive enable bit b7 b6 b5 b4 0 RW TI RO 0 : Data in UiTB register 1 : No data in UiTB register TE RO RW RI Receive complete flag(1) 0 : No data in UiRB register 1 : Data in UiRB register RE Set the UiRRM bit to 0 (disables continuous receive mode) in UART mode. UARTi transmit interrupt cause select bit 0 : Transmission buffer empty (TI=1) 1 : Transmission completed (TXEPT=1) RW UiRRM UARTi continuous receive mode enable bit(2) 0 : Disables continuous receive mode 1 : Enables continuous receive mode RW The RI bit is set to 0 w hen the higher byte of the UiRB register is read out. — (b7) UARTi Receive Buffer Register (i = 0 or 2) (1) Symbol After Reset U0RB Undefined U2RB Undefined RW NOTES: 1. 2. Nothing is assigned. If necessary, set to 0. When read, the content is undefined. — (b11-b9) Read out the UiRB register in 16-bit units. Bits SUM, PER, FER, and OER are set to 0 (no error) w hen bits SMD2 to SMD0 in the UiMR register are set to 000b (serial interface disabled) or the RE bit in the UiC1 register is set to 0 (receive disabled). The SUM bit is set to 0 (no error) w hen bits PER, FER, and OER are set to 0 (no error). Bits PER and FER are set to 0 even w hen the higher byte of the UiRB register is read out. Also, bits PER and FER are set to 0 w hen reading the high-order byte of the UiRB register. RO SUM Error sum flag(2) 0 : No error 1 : Error PER Parity error flag(2) 0 : No parity error 1 : Parity error RO FER Framing error flag(2) 0 : No framing error 1 : Framing error RO OER Overrun error flag(2) 0 : No overrun error 1 : Overrun error RO Bit Symbol Bit Name Address 00A7h-00A6h 0167h-0166h (b8) b0 (b15) b7 b0 b7 — — (b7-b0) — Function Receive data (D7 to D0) RO Receive data (D8) RO — (b8) — |
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