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H8S2245 Datasheet(PDF) 700 Page - Renesas Technology Corp |
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H8S2245 Datasheet(HTML) 700 Page - Renesas Technology Corp |
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700 / 818 page ![]() Appendix B Register Field Rev.3.00 Mar. 26, 2007 Page 658 of 772 REJ09B0355-0300 DTCER—DTC Enable Registers H'FF30 to H'FF35 DTC 7 DTCE7 0 R/W 6 DTCE6 0 R/W 5 DTCE5 0 R/W 4 DTCE4 0 R/W 3 DTCE3 0 R/W 0 DTCE0 0 R/W 2 DTCE2 0 R/W 1 DTCE1 0 R/W 0 1 DTC activation by this interrupt is disabled [Clearing conditions] • When the DISEL bit is 1 and data transfer has ended • When the specified number of transfers have ended DTC activation by this interrupt is enabled [Holding condition] When the DISEL bit is 0 and the specified number of transfers have not ended DTC Activation Enable Bit Initial value Read/Write : : : Correspondence between interrupt sources and DTCER bits Register Bit 7 IRQ0 — TGI2A — — RXI2 DTCERA DTCERB DTCERC DTCERD DTCERE DTCERF 6 IRQ1 ADI TGI2B — — TXI2 5 IRQ2 TGI0A — — — — 4 IRQ3 TGI0B — — — — 3 IRQ4 TGI0C — CMIA0 RXI0 — 2 IRQ5 TGI0D — CMIB0 TXI0 — 1 IRQ6 TGI1A — CMIA1 RXI1 — 0 IRQ7 TGI1B — CMIB1 TXI1 — |
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