| Electronic Components Datasheet Search |
|
HD6432351 Datasheet(PDF) 705 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
HD6432351 Datasheet(HTML) 705 Page - Renesas Technology Corp |
|
705 / 1025 page ![]() Section 17 RAM Rev. 3.00 Sep 15, 2006 page 671 of 988 REJ09B0330-0300 Section 17 RAM 17.1 Overview The H8S/2350 Group has 2 kbytes of on-chip high-speed static RAM. The RAM is connected to the CPU by a 16-bit data bus, enabling one-state access by the CPU to both byte data and word data. This makes it possible to perform fast word data transfer. The on-chip RAM can be enabled or disabled by means of the RAM enable bit (RAME) in the system control register (SYSCR). 17.1.1 Block Diagram Figure 17.1 shows a block diagram of the on-chip RAM. Internal data bus (upper 8 bits) Internal data bus (lower 8 bits) H'FFF400 H'FFF402 H'FFF404 H'FFFBFE H'FFF401 H'FFF403 H'FFF405 H'FFFBFF Figure 17.1 Block Diagram of RAM |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |