SH7751 datasheet(86/1224 Pages) RENESAS

86 / 1224 page

Rev.4.00 Oct. 10, 2008 Page lxxxvi of xcviii

REJ09B0370-0400

Figure 23.12 (1) Pin Drive Timing for Standby Mode ...........................................................

1008

Figure 23.12 (2) Pin Drive Timing for Software Standby Mode............................................

1009

Figure 23.13 SRAM Bus Cycle: Basic Bus Cycle (No Wait) .................................................

1014

Figure 23.14 SRAM Bus Cycle: Basic Bus Cycle (One Internal Wait) ..................................

1015

Figure 23.15 SRAM Bus Cycle: Basic Bus Cycle (One Internal Wait + One External Wait)

1016

Figure 23.16 SRAM Bus Cycle: Basic Bus Cycle (No Wait, Address Setup/

Hold Time Insertion, AnS = 1, AnH = 1)...........................................................

1017

Figure 23.17 Burst ROM Bus Cycle (No Wait) ......................................................................

1018

Figure 23.18 Burst ROM Bus Cycle (1st Data: One Internal Wait + One External Wait;

2nd/3rd/4th Data: One Internal Wait).................................................................

1019

Figure 23.19 Burst ROM Bus Cycle (No Wait, Address Setup/Hold Time Insertion,

AnS = 1, AnH = 1) .............................................................................................

1020

Figure 23.20 Burst ROM Bus Cycle (One Internal Wait + One External Wait) .....................

1021

Figure 23.21 Synchronous DRAM Auto-Precharge Read Bus Cycle: Single

(RCD [1:0] = 01, CAS Latency = 3, TPC [2:0] = 011) ......................................

1022

Figure 23.22 Synchronous DRAM Auto-Precharge Read Bus Cycle: Burst

(RCD [1:0] = 01, CAS Latency = 3, TPC [2:0] = 011) ......................................

1023

Figure 23.23 Synchronous DRAM Normal Read Bus Cycle: ACT + READ Commands,

Burst (RASD = 1, RCD [1:0] = 01, CAS Latency = 3)......................................

1024

Figure 23.24 Synchronous DRAM Normal Read Bus Cycle: PRE + ACT + READ

Commands, Burst (RASD = 1, RCD [1:0] = 01, TPC [2:0] = 001,

CAS Latency = 3)...............................................................................................

1025

Figure 23.25 Synchronous DRAM Normal Read Bus Cycle: READ Command, Burst

(RASD = 1, CAS Latency = 3) ..........................................................................

1026

Figure 23.26 Synchronous DRAM Auto-Precharge Write Bus Cycle: Single

(RCD [1:0] = 01, TPC [2:0] = 001, TRWL [2:0] = 010)....................................

1027

Figure 23.27 Synchronous DRAM Auto-Precharge Write Bus Cycle: Burst

(RCD [1:0] = 01, TPC [2:0] = 001, TRWL [2:0] = 010)....................................

1028

Figure 23.28 Synchronous DRAM Normal Write Bus Cycle: ACT + WRITE Commands,

Burst (RASD = 1, RCD [1:0] = 01, TRWL [2:0] = 010) ...................................

1029

Figure 23.29 Synchronous DRAM Normal Write Bus Cycle: PRE + ACT +

WRITE Commands, Burst (RASD = 1, RCD [1:0] = 01, TPC [2:0] = 001,

TRWL [2:0] = 010) ............................................................................................

1030

Figure 23.30 Synchronous DRAM Normal Write Bus Cycle: WRITE Command,

Burst (RASD = 1, TRWL [2:0] = 010) ..............................................................

1031

Figure 23.31 Synchronous DRAM Bus Cycle: Precharge Command (TPC [2:0] = 001) .......

1032

Figure 23.32 Synchronous DRAM Bus Cycle: Auto-Refresh (TRAS = 1, TRC [2:0] = 001)

1033

Figure 23.33 Synchronous DRAM Bus Cycle: Self-Refresh (TRC [2:0] = 001) ....................

1034

Figure 23.34 (a) Synchronous DRAM Bus Cycle: Mode Register Setting (PALL)...............

1035

Figure 23.34 (b) Synchronous DRAM Bus Cycle: Mode Register Setting (SET) .................

1036

SH7751 Datasheet(PDF) 86 Page - Renesas Technology Corp

SH7751 Datasheet(HTML) 86 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL