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32176 Datasheet(PDF) 49 Page - Renesas Technology Corp |
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32176 Datasheet(HTML) 49 Page - Renesas Technology Corp |
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49 / 742 page  2 CPU 2.6 Data Formats 2-11 32176 Group Hardware Manual Rev.1.10 REJ09B0067-0110 Jun 20.06 • Constant transfer LD24 Rdest, #imm24 LDI Rdest, #imm16 LDI Rdest, #imm8 SETH Rdest, #imm16 b23 b0 Rdest imm24 b31 b0 LD24 Rdest, #imm24 b15 b0 Rdest imm16 b31 b0 SETH Rdest, #imm16 00 8 15 00 00 • Register to register transfer MV Rdest, Rsrc • Control register transfer MVFC Rdest, CRsrc MVTC Rsrc, CRdest Rsrc b31 b0 Rdest b31 b0 Rsrc b31 b0 CRdest b31 b0 MVTC Rsrc, CRdest MV Rdest, Rsrc Note: • The condition bit C changes state when data is written to CR0 (PSW) using the MVTC instruction. Figure 2.6.6 Transfer Instructions (4) Transfer instructions |
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