32176 datasheet(13/742 Pages) RENESAS

13 / 742 page

Contents-3

32176 Group Hardware Manual

Rev.1.10 REJ09B0067-0110 Jun 20. 06

6.5.2

Controlling Operation Modes during Flash Programming ------------------------------------------- 6-23

6.5.3

Procedure for Programming/Erasing the Internal Flash Memory ---------------------------------- 6-27

6.5.4

Flash Programming Time (Reference) ------------------------------------------------------------------- 6-35

6.6 Virtual Flash Emulation Function -------------------------------------------------------------------------------------- 6-37

6.6.1

Virtual Flash Emulation Area -------------------------------------------------------------------------------- 6-38

6.6.2

Entering Virtual Flash Emulation Mode ------------------------------------------------------------------ 6-45

6.6.3

Application Example of Virtual Flash Emulation Mode ----------------------------------------------- 6-46

6.7 Connecting to a Serial Programmer (CSIO Mode) --------------------------------------------------------------- 6-48

6.8 Connecting to a Serial Programmer (UART Mode) -------------------------------------------------------------- 6-50

6.9 Internal Flash Memory Protect Function ---------------------------------------------------------------------------- 6-52

6.10 Notes on the Internal RAM -------------------------------------------------------------------------------------------- 6-53

6.11 Notes on the Internal Flash Memory ------------------------------------------------------------------------------- 6-53

CHAPTER 7 RESET

7.1 Outline of Reset ----------------------------------------------------------------------------------------------------------- 7-2

7.2 Reset Operation ----------------------------------------------------------------------------------------------------------- 7-2

7.2.1

Reset at Power-on --------------------------------------------------------------------------------------------- 7-3

7.2.2

Reset during Operation --------------------------------------------------------------------------------------- 7-3

7.2.3

Reset Vector Relocation during Flash Programming ------------------------------------------------- 7-3

7.3 Internal State Immediately after Exiting Reset -------------------------------------------------------------------- 7-4

7.4 Things to Be Considered after Exiting Reset ---------------------------------------------------------------------- 7-4

CHAPTER 8 INPUT/OUTPUT PORTS AND PIN FUNCTIONS

8.1 Outline of Input/Output Ports ------------------------------------------------------------------------------------------- 8-2

8.2 Selecting Pin Functions ------------------------------------------------------------------------------------------------- 8-3

8.3 Input/Output Port Related Registers --------------------------------------------------------------------------------- 8-5

8.3.1

Port Data Registers -------------------------------------------------------------------------------------------- 8-7

8.3.2

Port Direction Registers -------------------------------------------------------------------------------------- 8-8

8.3.3

Port Operation Mode Registers ---------------------------------------------------------------------------- 8-9

8.3.4

Port Peripheral Function Select Register ---------------------------------------------------------------- 8-14

8.3.5

Port Input Special Function Control Register ----------------------------------------------------------- 8-15

8.4 Port Input Level Switching Function ---------------------------------------------------------------------------------- 8-18

8.5 Port Peripheral Circuits -------------------------------------------------------------------------------------------------- 8-20

8.6 Notes on Input/Output Ports -------------------------------------------------------------------------------------------- 8-25

CHAPTER 9 DMAC

9.1 Outline of the DMAC ----------------------------------------------------------------------------------------------------- 9-2

9.2 DMAC Related Registers ----------------------------------------------------------------------------------------------- 9-4

9.2.1

DMA Channel Control Registers --------------------------------------------------------------------------- 9-6

9.2.2

DMA Software Request Generation Registers --------------------------------------------------------- 9-12

9.2.3

DMA Source Address Registers --------------------------------------------------------------------------- 9-13

9.2.4

DMA Destination Address Registers ---------------------------------------------------------------------- 9-14

9.2.5

DMA Transfer Count Registers ----------------------------------------------------------------------------- 9-15

9.2.6

DMA Interrupt Related Registers -------------------------------------------------------------------------- 9-16

9.3 Functional Description of the DMAC --------------------------------------------------------------------------------- 9-22

9.3.1

DMA Transfer Request Sources --------------------------------------------------------------------------- 9-22

9.3.2

DMA Transfer Processing Procedure --------------------------------------------------------------------- 9-25

32176 Datasheet(PDF) 13 Page - Renesas Technology Corp

32176 Datasheet(HTML) 13 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL