R8C35A datasheet(86/766 Pages) RENESAS

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R8C/35A Group

6. Voltage Detection Circuit

REJ09B0407-0010 Rev.0.10

Jan 16, 2008

Page 55 of 728

Under development Preliminary specification

Specifications in this manual are tentative and subject to change

Figure 6.7

Operating Example of Voltage Monitor 2 Interrupt

Vdet2

VW1C3 bit

VCC or LVCMP2

The above applies when:

• VCA27 bit in VCA2 register = 1 (voltage detection 2 circuit enabled)

• VW2C0 bit in VW2C register = 1 (voltage monitor 2 interrupt enabled)

Note:

1. If voltage monitor 0 reset is not used, set the power supply to VCC

≥ 1.8 V.

1.8 V (1)

Sampling clock of

digital filter

× 2 cycles

VW2C2 bit

VW2C1 bit is set to 1

(digital filter disabled),

VCAC2 bit is set to 0

(one edge),

and

VW2C7 bit is set to 0

(when VCC or LVCMP2

reaches Vdet2 or above)

VCA13: Bit in VCA1 register

VW2C1, VW2C2, VW2C3, VW2C7: Bits in VW2C register

VCAC2: Bit in VCAC register

Sampling clock of

digital filter

× 2 cycles

Set to 0 by a program.

Voltage monitor 2

interrupt request

Voltage monitor 2

interrupt request

Set to 0 when an interrupt request

is acknowledged.

VW2C2 bit

Voltage monitor 2

interrupt request

VW2C1 bit is set to 0

(digital filter enabled)

and

VCAC2 bit is set to 1

(both edges)

VW2C2 bit

Set to 0 when an interrupt request

is acknowledged.

Set to 0 by a program.

Voltage monitor 2

interrupt request

VW2C1 bit is set to 0

(digital filter enabled),

VCAC2 bit is set to 0

(one edge),

and

VW2C7 bit is set to 0

(when VCC or LVCMP2

reaches Vdet2 or above)

VW2C2 bit

Voltage monitor 2

interrupt request

VW2C1 bit is set to 0

(digital filter enabled),

VCAC2 bit is set to 0

(one edge),

and

VW2C7 bit is set to 1

(when VCC or LVCMP2

reaches Vdet2 or below)

Set to 0 by a program.

VW2C2 bit

Voltage monitor 2

interrupt request

VW2C1 bit is set to 1

(digital filter disabled)

and

VCAC2 bit is set to 1

(both edges)

Set to 0 by a program.

Set to 0 when an interrupt request

is acknowledged.

Set to 0 by a program.

Set to 0 when an interrupt request

is acknowledged.

Set to 0 by a program.

VW2C1 bit is set to 1

(digital filter disabled),

VCAC2 bit is set to 0

(one edge),

and

VW2C7 bit is set to 1

(when VCC or LVCMP2

reaches Vdet2 or below)

Set to 0 when an interrupt request

is acknowledged.

Set to 0 when an interrupt request

is acknowledged.

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