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R8C35A Datasheet(PDF) 21 Page - Renesas Technology Corp |
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R8C35A Datasheet(HTML) 21 Page - Renesas Technology Corp |
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21 / 766 page ![]() A - 14 25.5 Operation in 4-Wire Bus Communication Mode .................................................................................. 519 25.5.1 Initialization in 4-Wire Bus Communication Mode ......................................................................... 520 25.5.2 Data Transmission ............................................................................................................................ 521 25.5.3 Data Reception .................................................................................................................................. 523 25.5.4 SCS Pin Control and Arbitration ...................................................................................................... 525 25.6 Notes on Synchronous Serial Communication Unit .............................................................................. 526 26. I2C bus Interface ......................................................................................................................... 527 26.1 Overview ............................................................................................................................................... 527 26.2 Registers ................................................................................................................................................ 530 26.2.1 Module Standby Control Register (MSTCR) ................................................................................... 530 26.2.2 SSU/IIC Pin Select Register (SSUIICSR) ........................................................................................ 531 26.2.3 IIC bus Transmit Data Register (ICDRT) ......................................................................................... 532 26.2.4 IIC bus Receive Data Register (ICDRR) .......................................................................................... 532 26.2.5 IIC bus Control Register 1 (ICCR1) ................................................................................................. 533 26.2.6 IIC bus Control Register 2 (ICCR2) ................................................................................................. 534 26.2.7 IIC bus Mode Register (ICMR) ........................................................................................................ 535 26.2.8 IIC bus Interrupt Enable Register (ICIER) ....................................................................................... 536 26.2.9 IIC bus Status Register (ICSR) ......................................................................................................... 537 26.2.10 Slave Address Register (SAR) .......................................................................................................... 538 26.2.11 IIC bus Shift Register (ICDRS) ........................................................................................................ 538 26.3 Common Items for Multiple Modes ...................................................................................................... 539 26.3.1 Transfer Clock .................................................................................................................................. 539 26.3.2 Interrupt Requests ............................................................................................................................. 540 26.4 I2C bus Interface Mode ......................................................................................................................... 541 26.4.1 I2C bus Format ................................................................................................................................. 541 26.4.2 Master Transmit Operation ............................................................................................................... 542 26.4.3 Master Receive Operation ................................................................................................................ 544 26.4.4 Slave Transmit Operation ................................................................................................................. 547 26.4.5 Slave Receive Operation ................................................................................................................... 550 26.5 Clock Synchronous Serial Mode ........................................................................................................... 552 26.5.1 Clock Synchronous Serial Format .................................................................................................... 552 26.5.2 Transmit Operation ........................................................................................................................... 553 26.5.3 Receive Operation ............................................................................................................................. 554 26.6 Examples of Register Setting ................................................................................................................ 555 26.7 Noise Canceller ..................................................................................................................................... 559 26.8 Bit Synchronization Circuit ................................................................................................................... 560 26.9 Notes on I2C bus Interface .................................................................................................................... 561 27. Hardware LIN .............................................................................................................................. 562 27.1 Overview ............................................................................................................................................... 562 27.2 Input/Output Pins .................................................................................................................................. 563 27.3 Registers ................................................................................................................................................ 564 27.3.1 LIN Control Register 2 (LINCR2) .................................................................................................... 564 27.3.2 LIN Control Register (LINCR) ......................................................................................................... 565 27.3.3 LIN Status Register (LINST) ............................................................................................................ 565 27.4 Function Description ............................................................................................................................. 566 27.4.1 Master Mode ..................................................................................................................................... 566 27.4.2 Slave Mode ....................................................................................................................................... 569 |
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