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M38K02FDFP Datasheet(PDF) 185 Page - Renesas Technology Corp

Part # M38K02FDFP
Description  RENESAS 8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES
PDF  328 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M38K02FDFP Datasheet(HTML) 185 Page - Renesas Technology Corp

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2.4 Serial I/O
Rev.2.00
Oct 05, 2006
page 56 of 111
38K0 Group
REJ09B0337-0200
APPLICATION
(3)
Cyclic transmission or reception of block data (data of specified number of bytes) between
two microcomputers
Outline : When the clock synchronous serial I/O is used for communication, synchronization of the
clock and the data between the transmitting and receiving sides may be lost because of
noise included in the synchronous clock. It is necessary to correct that constantly, using
“heading adjustment”.
This “heading adjustment” is carried out by using the interval between blocks in this
example.
Figure 2.4.24 shows a connection diagram.
Fig. 2.4.24 Connection diagram
Specifications :
• The serial I/O is used (clock synchronous serial I/O is selected).
• Synchronous clock frequency : 125 kHz (f(XIN) = 6 MHz is divided by 48)
• Byte cycle: 488
µs
• Number of bytes for transmission or reception : 8 byte/block
• Block transfer cycle : 16 ms
• Block transfer term : 3.5 ms
• Interval between blocks : 12.5 ms
• Heading adjustment time : 8 ms
Limitations of specifications :
• Reading of the reception data and setting of the next transmission data must be
completed within the time obtained from “byte cycle – time for transferring 1-byte
data” (in this example, the time taken from generating of the serial I/O receive
interrupt request to input of the next synchronous clock is 431
µs).
•“Heading adjustment time < interval between blocks” must be satisfied.
SCLK
Master unit
SCLK
Slave
TXD
RXD
TXD
RXD



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