TDA9113 datasheet(36/50 Pages) STMICROELECTRONICS

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TDA9113

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Figure 14. HDyCor output horizontal component waveform

9.7 - DC/DC CONTROLLER SECTION

The section is designed to control a switch-mode

DC/DC converter. A switch-mode DC/DC conver-

tor generates a DC voltage from a DC voltage of

different value (higher or lower) with little power

losses. The DC/DC controller is synchronized to

horizontal deflection frequency to minimize poten-

tial interference into the picture.

Its operation is similar to that of standard UC3842.

The schematic diagram of the DC/DC controller is

in Figure 15. The BOut output controls an external

switching circuit (a MOS transistor) delivering

pulses synchronized on horizontal deflection fre-

quency, the phase of which depends on I2C bus

configuration, see the table at the end of this chap-

ter. Their duration depends on feedback provided

to the circuit, generally a copy of DC/DC converter

output voltage and a copy of current passing

through the DC/DC converter circuitry (e.g. current

through external power component). The polarity

of the output can be controlled by BOutPol I2C bus

bit. A NPN transistor open-collector is routed out to

the BOut pin.

During the operation, a sawtooth is to be found on

pin BISense, generated externally by the applica-

tion. According to BOutPh I2C bus bit, the R-S flip-

flop is set either at H-drive signal edge (rising or

falling, depending on BOHEdge I2C bus bit), or a

certain delay (tBTrigDel /TH) after middle of H-fly-

back. The output is set On at the end of a short

pulse generated by the monostable trigger.

Timing of reset of the R-S flip-flop affects duty cy-

cle of the output square signal and so the energy

transferred from DC/DC converter input to its out-

put. A reset edge is provided by comparator C2 if

the voltage on pin BISense exceeds the internal

threshold VThrBIsCurr. This represents current limi-

tation if a voltage proportional to the current

through the power component or deflection stage

is available on pin BISense. This threshold is af-

fected by the voltage on pin HPosF, which rises at

soft start and descends at soft stop. This ensures

self-contained soft control of duty cycle of the out-

put signal on pin BOut. Refer to Figure 10. Another

tHVD-Hoffset

VHVD-H

HDyCorPh

VHVD-DC

Shaped H-flyback

(I2C)

tHVD-Hoffset

(min)

(max)

tHVD-Hflat

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