3-95

TELCOM SEMICONDUCTOR, INC.

7

6

5

4

3

1

2

8

TC7109/A PIN DESCRIPTION

40-Pin PDIP

Pin Number

Symbol

Description

1

GND

Digital ground, 0V, ground return for all digital logic.

2

STATUS

Output HIGH during integrate and deintegrate until data is latched. Output LOW

when analog section is in auto-zero or zero-integrator configuration.

3

POL

Polarity — High for positive input.

4

OR

Overrange — High if overranged.

Bit 12 (Most Significant Bit)

Bit 11

Bit 10

Bit 9

Bit 8

10

Bit 7

11

Bit 6

12

Bit 5

13

Bit 4

14

Bit 3

15

Bit 2

16

Bit 1 (Least Significant Bit)

17

TEST

Input High — Normal operation. Input LOW — Forces all bit outputs HIGH.

Note: This input is used for test purposes only.

18

Low-Byte Enable — With MODE (Pin 21) LOW, and CE/LOAD (Pin 20) LOW,

taking this pin LOW activates low-order byte outputs, B1–B8. With MODE (Pin 21)

HIGH, this pin serves as low-byte flag output used in handshake mode. See

Figures 7, 8, and 9.

19

High-Byte Enable — With MODE (Pin 21) LOW, and CE/LOAD (Pin 20) LOW,

taking this pin LOW activates high-order byte outputs, B9–B12, POL, OR. With

MODE (Pin 21) HIGH, this pin serves as high-byte flag output used in handshake

mode. See Figures 7, 8, and 9.

20

Chip Enable/Load — With MODE (Pin 21) LOW, CE/LOAD serves as a master

output enable. When HIGH, B1–B12, POL, OR outputs are disabled. When

MODE (Pin 21) is HIGH, a load strobe is used in handshake mode. See Figure 7,

8, and 9.

21

MODE

Input LOW — Direct output mode where CE/LOAD (Pin 20), HBEN (Pin 19), and

LBEN (Pin 18) act as inputs directly controlling byte outputs.

Input Pulsed HIGH — Causes immediate entry into handshake mode and output

of data as in Figure 9.

Input HIGH — Enables CE/LOAD (Pin 20), HBEN (Pin 19), and LBEN (Pin 18)

as outputs, handshake mode will be entered and data output as in Figures 7 and

8 at conversions completion.

22

OSC IN

Oscillator Input

23

OSC OUT

Oscillator Output

24

OSC SEL

Oscillator Select — Input HIGH configures OSC IN, OSC OUT, BUF OSC OUT as

RC oscillator — clock will be same phase and duty cycle as BUF OSC OUT. Input

LOW configures OSC IN, OSC OUT for crystal oscillator — clock frequency will

be 1/58 of frequency at BUF OSC OUT.

25

BUF OSC OUT

Buffered Oscillator Output

26

Input HIGH — Conversions continuously performed every 8192 clock pulses.

Input LOW — Conversion in progress completed; converter will stop in auto-zero

seven counts before integrate.

HBEN

CE/LOAD

RUN/HOLD

All Three-State Data Bits

TC7109

TC7109A

12-BIT

ANALOG-TO-DIGITAL CONVERTERS

LBEN