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LTC1760

1760f

TERMINATE_CHARGE_RESERVED Bit

The read only TERMINATE_CHARGE_RESERVED bit is

used by the LTC1760 to determine if charging may con-

tinue.

Allowed values are:

'b1: The LTC1760 will not charge this battery.

'b0: The LTC1760 may charge this battery if other

conditions permit charging.

OVER_TEMP_ALARM Bit

The read only OVER_TEMP_ALARM is used by the LTC1760

to determine if charging may continue.

Allowed values are:

'b1: The LTC1760 will not charge this battery.

'b0: The LTC1760 may charge this battery if other

conditions permit charging.

TERMINATE_DISCHARGE_ALARM Bit

The read only TERMINATE_DISCHARGE_ALARM bit is

used by the LTC1760 to determine if discharge from the

battery is still allowed. This is used for power path man-

agement and battery calibration.

Allowed values are:

'b1: The LTC1760 will terminate calibration and should

try to not use this battery in the power path. When all

other power paths fail the LTC1760 will ignore this

alarm and still try to supply system power from this

source.

'b0: The LTC1760 may continue discharging this

battery.

FULLY_DISCHARGED Bit

The read only FULLY_DISCHARGED bit is used by the

LTC1760 to determine if discharge from the battery is still

allowed. This is used for power path management and

battery calibration.

Allowed values are:

'b1: The LTC1760 will terminate calibration and should

try to not use this battery in the power path. When all

other power paths fail the LTC1760 will ignore this

alarm and still try to supply system power from this

source.

OPERATIO

'b0: The LTC1760 may continue discharging this

battery.

2.3.11 AlertResponse ()

Description:

The SMBus Host uses the Alert Response Address (ARA)

to quickly identify the generator of an SMBALERT# event.

Purpose:

The LTC1760 will respond to an ARA if the SMBALERT

signal is actively pulling down the SMBALERT# bus. The

LTC1760 will follow the prioritization reporting as defined

in the “System Management Bus Specification”.

SMBus Protocol: A 7-bit Addressable Device Responds to

an ARA.

Output:

The device address will be sent to the SMBus Host. The

LTC1760 device address is 0x14 (or 0x0a if just looking at

the 7 bit address field).

The following events will cause the LTC1760 to pull-down

the SMBALERT# bus through the SMBALERT pin:

• Change of AC_PRESENT in the

BatterySystemStateCont() function.

• Change of BATTERY_PRESENT in the

BatterySystemState() function.

• Internal power on reset condition.

Refer to "Section 2.2" for bit mapping.

2.4 SMBus Dual Port Operation

The SMBus Interface includes the LTC1760’s SMBus

controller, as well as circuitry to arbitrate and connect the

battery and SMBus Host interfaces. The SMBus controller

generates and interprets all LTC1760 SMBus functions.

The dual port operation allows the SMBus Host to be

connected to the SMBus of either battery by setting the

SMB_BAT[4:1] nibble. Arbitration is handled by stretch-

ing an SMBus start sequence when a bus collision might

occur. Whenever configurations are switched, the LTC1760

will generate a harmless SMBus reset on SMB1 and SMB2

as required. The four possible configurations are illus-

trated in Figure 1. Sample SMBus communications are

shown in Figures 2 and 3.

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