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TLV320AD11APZ Datasheet(PDF) 1 Page - Texas Instruments

Part # TLV320AD11APZ
Description  3.3 V INTEGRATED ADSL OVER POTS CODEC
PDF  28 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TLV320AD11APZ Datasheet(HTML) 1 Page - Texas Instruments

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TLV320AD11A
3.3 V INTEGRATED ADSL OVER POTS CODEC
SLWS087B – JUNE 1999 – REVISED MARCH 2000
1
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
D Complete Discrete Multitone (DMT)-Based
Asymmetric Digital Subscriber Line (ADSL)
Coder/Decoder (CODEC) Solution
D Complies With ANSI T1.413 Issue II and ITU
G.992.1
D Supports up to 8 MBPS Downstream and
800 KBPS Upstream Duplex
D Integrated 14-Bit Converters for
Transmitter/Echo-Canceller/Receiver
(TX/EC/RX)
D Integrated 12-Bit DAC for VCXO Control
D Integrated TX/EC/RX Channel Filters
D Integrated TX/EC/RX Attenuation/Gain
D Integrated Voltage Reference
D High-Speed Parallel Interface
D 16-bit 2s Complement Data Format
D Selectable 2.2 MSPS or 4.4 MSPS Parallel
Data Transfer Rate
D Serial Configuration Port
D Eight General-Purpose Output Pins
D Single 3.3-V Supply
D Hardware/Software Power Down
D 100-Pin PQFP (PZ) Package
D –40°C to 85°C Operation
description
The TLV320AD11A is a high-speed codec for remote terminal-side (RT) modems that support the ANSI T1.413
[Issue 2 discrete multi-tone (DMT) asymmetric digital subscriber line (ADSL) access] and ITU G.992.1
standards. It is a low-power device that includes five major functional blocks: transmitter, receiver, clock,
reference, and host interface. It is designed to work with the Texas Instruments TLV320AD12 central office-side
(CO) codec.
The device’s transmit channel consists of the following functional blocks: 138 kHz digital low-pass filter,
bypassable 25.875 kHz digital high-pass filter, 14-bit high speed DAC, 138 kHz analog low-pass filter, transmit
attenuator, and an echo cancellation channel. The receiver channel consists of two programmable-gain
amplifiers, a frequency equalizer, a 1.104-MHz low-pass analog filter, a 14-bit high speed ADC, and a
1.104-MHz low-pass digital filter. The clock circuit divides a 35.328-MHz frequency from an external VCXO
down to the necessary frequencies used throughout the device. The frequency of the external VCXO is
controlled by a 12-bit onboard voltage output DAC. An onboard reference circuit generates a 1.5-V reference for
the converters.
The device has a parallel port for data transfer and a serial port for control. The parallel port is 16 bits wide and is
reserved for moving data between the codec and a DSP such as the Texas Instruments TMS320C6XX.
Configuration is done via a serial port. The device can be powered down via a dedicated pin, or through software
control, to reduce heat dissipation. Additionally, there is a general-purpose (GP) port consisting of eight output
terminals for control of external circuitry.
The TLV320AD11A codec is available in a 100-pin PZ PQFP package and is characterized for operation in the
temperature range of –40
°C to 85°C.
Copyright
© 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.


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