PCF8579TSLASH1 datasheet(25/41 Pages) NXP

25 / 41 page

PCF8579_5

Product data sheet

Rev. 05 — 11 May 2009

25 of 41

NXP Semiconductors

PCF8579

LCD column driver for dot matrix graphic displays

10. Static characteristics

[1]

Outputs are open; inputs at VDD or VSS; I2C-bus inactive; external clock with 50 % duty factor.

[2]

Resets all logic when VDD <VPOR.

[3]

Periodically sampled; not 100 % tested.

[4]

Resistance measured between output terminal (C0 to C39) and bias input (V3, V4, VDD and VLCD) when the speciﬁed current ﬂows

through one output under the following conditions (see Table 4):

a) Voper =VDD − VLCD =9V.

b) V3 − VLCD ≥ 4.70 V; V4 − VLCD ≤ 4.30 V; Iload = 100 µA.

Table 14.

Static characteristics

VDD = 2.5 V to 6 V; VSS =0V; VLCD =VDD − 3.5 V to VDD − 9V;Tamb = −40 °C to +85 °C; unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Supplies

VDD

supply voltage

2.5

6.0

VLCD

LCD supply voltage

VDD − 9-

VDD − 3.5

IDD

supply current

fclk = 2 kHz

[1]

-9

µA

VPOR

power-on reset voltage

[2]

1.3

1.8

Logic

VIL

LOW-level input voltage

VSS

0.3VDD

VIH

HIGH-level input voltage

0.7VDD

-VDD

leakage current

at pins SDA, SCL,

SYNC, CLK, TEST

and SA0, A0 to A3;

Vi =VDD or VSS

−1

IOL

LOW-level output current

at pin SDA;

VOL = 0.4 V;

VDD =5V

--mA

input capacitance

at pin SCL and SDA

[3]

--5

LCD outputs

leakage current

at pins V3 and V4;

Vi =VDD or VLCD

−2-

µA

Voffset(DC)

DC offset voltage

on pins C0 to C39

±20

output resistance

on pins at C0 to C39

[4]

36k

Ω

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