TMC2192 datasheet(56/69 Pages) CADEKA

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TMC2192

PRODUCT SPECIFICATION

REV. 1.0.0 8/13/03

Control Register Deﬁnitions (continued)

Color Space Matrix Register (0x3F)

76543210

SEL_CLK

RESERVED

GAUSS_BYP

SEL_PIX

C2DB_OFF

NMEH

CSMFMT

Reg

Bit

Name

Description

SEL_PIX

DCVBS Output Selection.

When SEL_PIX is HIGH, the interpolated pixel data is selected as the

output for the DCVBS port. When SEL_PIX is LOW, the non-interpolated

pixel data is selected as the output for the DCVBS port.

RESERVED

Program Low

GAUSS_BYP

Gaussian Bypass Select.

When GAUSS_BYP is LOW, the gaussian filter is enabled.

When GAUSS_BYP is HIGH, the gaussian filter is bypassed.

SEL_CLK

DCVBS Clock Select.

When SEL_CLK is LOW, the DCVBS output is clocked at the PXCK.

When SEL_CLK is HIGH, the DCVBS output is clocked at the PCK.

C2DB_OFF

COMP2DB Offset Selection.

When C2DB_OFF is HIGH an offset of 256 is added to the COMP2 output

allowing the chrominance data that extends below the sync level to be

passed through the outputs.

2-0

RESERVED

Program Low

Subcarrier Register (0x40)

76543210

FREQL

Reg

Bit

Name

Description

7-0

FREQL

Subcarrier Frequency.

Bits 7-0 of the subcarrier frequency FREQL[31:0].

TMC2192 Datasheet(PDF) 56 Page - Cadeka Microcircuits LLC.

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