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ST7263BEx Datasheet(PDF) 57 Page - STMicroelectronics |
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ST7263BEx Datasheet(HTML) 57 Page - STMicroelectronics |
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57 / 186 page ![]() ST7263Bxx On-chip peripherals Doc ID 7516 Rev 8 57/186 11.1.8 Register description Control register (CR) Reset value: 0111 1111 (7Fh) 7 0 WDGA T6 T5 T4 T3 T2 T1 T0 Read/write 7 WDGA Activation bit. This bit is set by software and only cleared by hardware after a reset. When WDGA = 1, the watchdog can generate a reset. 0: Watchdog disabled 1: Watchdog enabled [6:0] T[6:0] 7-bit timer (MSB to LSB). These bits contain the decremented value. A reset is produced when it rolls over from 40h to 3Fh (T6 becomes cleared). Table 18. Watchdog timer register map and reset values Address (Hex.) Register Label 76 5 4 321 0 0Ch WDGCR Reset value WDGA 0 T6 1 T5 1 T4 1 T3 1 T2 1 T1 1 T0 1 |
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