PIC18F44J10-ISLASHML datasheet(34/368 Pages) MICROCHIP

34 / 368 page

PIC18F45J10 FAMILY

DS39682E-page 32

3.7

Effects of Power-Managed Modes

on the Various Clock Sources

When PRI_IDLE mode is selected, the designated pri-

mary oscillator continues to run without interruption.

For all other power-managed modes, the oscillator

using the OSC1 pin is disabled. The OSC1 pin (and

OSC2 pin if used by the oscillator) will stop oscillating.

secondary

clock

modes

(SEC_RUN

and

SEC_IDLE), the Timer1 oscillator is operating and

providing the device clock. The Timer1 oscillator may

also run in all power-managed modes if required to

clock Timer1 or Timer3.

In RC_RUN and RC_IDLE modes, the internal oscilla-

tor provides the device clock source. The 31 kHz

INTRC output can be used directly to provide the clock

and may be enabled to support various special

features, regardless of the power-managed mode (see

Section 21.2 “Watchdog Timer (WDT)”

through

Section 21.5 “Fail-Safe Clock Monitor”

for more

information on WDT, Fail-Safe Clock Monitor and

Two-Speed Start-up).

If the Sleep mode is selected, all clock sources are

stopped. Since all the transistor switching currents

have been stopped, Sleep mode achieves the lowest

current consumption of the device (only leakage

currents).

Enabling any on-chip feature that will operate during

Sleep will increase the current consumed during Sleep.

The INTRC is required to support WDT operation. The

Timer1 oscillator may be operating to support a

real-time clock. Other features may be operating that

do not require a device clock source (i.e., MSSP slave,

PSP, INTx pins and others). Peripherals that may add

significant

current

consumption

are

listed

Section 24.2 “DC Characteristics: Power-Down and

Supply Current”

OSCCON: OSCILLATOR CONTROL REGISTER

R/W-0

U-0

R-q(1)

U-0

R/W-0

IDLEN

—

—OSTS

—

SCS1

SCS0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

IDLEN:

Idle Enable bit

= Device enters an Idle mode on SLEEP instruction

= Device enters Sleep mode on SLEEP instruction

bit 6-4

Unimplemented:

Read as ‘0’

bit 3

OSTS:

Oscillator Start-up Time-out Status bit(1)

= Oscillator Start-up Timer (OST) time-out has expired; primary oscillator is running

= Oscillator Start-up Timer (OST) time-out is running; primary oscillator is not ready

bit 2

Unimplemented:

Read as ‘0’

bit 1-0

SCS<1:0>:

System Clock Select bits(4)

= Internal oscillator

= Primary oscillator

= Timer1 oscillator

When FOSC2 = 1:

= Primary oscillator

When FOSC2 = 0:

= Internal oscillator

Note 1:

The Reset value is ‘0’ when HS mode and Two-Speed Start-up are both enabled; otherwise, it is ‘1’.

PIC18F44J10-I/ML Datasheet(PDF) 34 Page - Microchip Technology

PIC18F44J10-I/ML Datasheet(HTML) 34 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL