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EDD51163DBH-LS Datasheet(PDF) 11 Page - Elpida Memory

Part # EDD51163DBH-LS
Description  512M bits DDR Mobile RAM??WTR (Wide Temperature Range), Low Power Function
PDF  60 Pages
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Manufacturer  ELPIDA [Elpida Memory]
Direct Link  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

EDD51163DBH-LS Datasheet(HTML) 11 Page - Elpida Memory

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EDD51163DBH-LS
Preliminary Data Sheet E1433E30 (Ver. 3.0)
11
Timing Parameter Measured in Clock Cycle
Number of clock cycle
tCK
5.0ns
6.0ns
7.5ns
Parameter
Symbol
min.
max.
min.
max.
min.
max.
Unit
Write to pre-charge command delay
(same bank)
tWPD
4 + BL/2
4 + BL/2
3 + BL/2
tCK
Read to pre-charge command delay
(same bank)
tRPD
BL/2
BL/2
BL/2
tCK
Write to read command delay
(to input all data)
tWRD
3 + BL/2
2 + BL/2
2 + BL/2
tCK
Burst stop command to write
command delay
(CL = 3)
tBSTW
3
3
3
tCK
Burst stop command to DQ high-Z
(CL = 3)
tBSTZ
3
3
3
tCK
Read command to write command
delay (to output all data)
(CL = 3)
tRWD
3 + BL/2
3 + BL/2
3 + BL/2
tCK
Pre-charge command to high-Z
(CL = 3)
tHZP
3
3
3
tCK
Write command to data in latency
tWCD
1
1
1
tCK
Write recovery
tWR
3
3
2
tCK
DM to data in latency
tDMD
0
0
0
tCK
Mode register set command cycle
time
tMRD
2
2
2
tCK
Self-refresh exit to non-column
command
tSREX
24
20
16
tCK
Auto-refresh period
tRFC
15
12
10
tCK
Power-down entry
tPDEN
2
2
1
tCK
Power-down exit to command input
tPDEX
1
1
1
tCK
CKE minimum pulse width
tCKE
2
2
2
tCK



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