P89CV51RB2_09 datasheet(45/76 Pages) NXP

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P89CV51RB2_RC2_RD2_3

Product data sheet

Rev. 03 — 25 August 2009

45 of 76

NXP Semiconductors

P89CV51RB2/RC2/RD2

80C51 with 1 kB RAM, SPI

set by hardware when either a match or a capture occurs. These ﬂags can only be cleared

by software. All the modules share one interrupt vector. The PCA interrupt system is

shown in Figure 20.

Each module in the PCA has a special function register associated with it. These registers

are: CCAPM0 for module 0, CCAPM1 for module 1, etc. The registers contain the bits that

control the mode that each module will operate in.

The ECCF bit (from CCAPMn.0 where n = 0, 1, 2, 3, or 4 depending on the module)

enables the CCFn ﬂag in the CCON SFR to generate an interrupt when a match or

compare occurs in the associated module; see Figure 20.

PWM (CCAPMn.1) enables the PWM mode.

The TOG bit (CCAPMn.2) when set causes the CEX output associated with the module to

toggle when there is a match between the PCA counter and the module’s

capture/compare register.

The match bit MAT (CCAPMn.3) when set will cause the CCFn bit in the CCON register to

be set when there is a match between the PCA counter and the module’s

capture/compare register.

The next two bits CAPN (CCAPMn.4) and CAPP (CCAPMn.5) determine the edge that a

capture input will be active on. The CAPN bit enables the negative edge, and the CAPP bit

enables the positive edge. If both bits are set both edges will be enabled and a capture will

occur for either transition.

The last bit in the register ECOM (CCAPMn.6) when set enables the comparator function.

There are two additional registers associated with each of the PCA modules. They are

CCAPnH and CCAPnL and these are the registers that store the 16-bit count when a

capture occurs or a compare should occur. When a module is used in the PWM mode,

these registers are used to control the duty cycle of the output.

P89CV51RB2 Datasheet(PDF) 45 Page - NXP Semiconductors