PCIMX513CJM6C datasheet(20/184 Pages) FREESCALE

20 / 184 page

i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 1

Freescale Semiconductor

Preliminary—Subject to Change Without Notice

Electrical Characteristics

3.1.2

USB PHY Current Consumption

3.2

Supply Power-Up/Power-Down Requirements and Restrictions

The system design must comply with the power-up and power-down sequence guidelines as described in

this section to guarantee reliable operation of the device. Any deviation from these sequences may result

in the following situations:

•

Excessive current during power-up phase

•

Prevention of the device from booting

•

Irreversible damage to the i.MX51 processor (worst-case scenario)

Stop Mode

• External reference clocks

enabled

• No power gating for ARM and

processing units

• HPM voltage

VDDGP = 1.1 V, VCC = 1.225 V, VDDA = 1.2 V

All PLLs off, all CCM-generated clocks off

CKIL input on with 32 kHz signal present

All modules disabled

USBPHY PLL off

External (MHz) crystal and on-chip oscillator

powered and generating reference clock

No external resistive loads that cause current flow

TA = 25

°C

VDDGP

VCC

VDDA

1.15

NVCC_OSC

1.5

Total

The data in this table will be finalized after the complete characterization of the silicon.

Table 12. USB PHY Current Consumption

Parameter

Conditions

Typical @ 25 °C

Max

Unit

Analog Supply

VDDA33 (3.3 V)

Full Speed

5.5

High Speed

Analog Supply

NVCC_USBPHY (2.5 V)

Full Speed

6.5

High Speed

Digital Supply

VCC (1.2 V)

Full Speed

High Speed

VDDA33 + NVCC_USBPHY +VCC

Suspend

100

μA

Table 11. i.MX51 Stop Mode Current and Power Consumption (continued)1

Mode

Condition

Supply

Nominal

Unit

PCIMX513CJM6C Datasheet(PDF) 20 Page - Freescale Semiconductor, Inc

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