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PCIMX515CJM6C Datasheet(PDF) 118 Page - Freescale Semiconductor, Inc |
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PCIMX515CJM6C Datasheet(HTML) 118 Page - Freescale Semiconductor, Inc |
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118 / 184 page  i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 1 118 Freescale Semiconductor Preliminary—Subject to Change Without Notice Electrical Characteristics 3.7.13 SCAN JTAG Controller (SJC) Timing Parameters Figure 85 depicts the SJC test clock input timing. Figure 86 depicts the SJC boundary scan timing. Figure 87 depicts the SJC test access port. Signal parameters are listed in Table 86. Figure 85. Test Clock Input Timing Diagram Figure 86. Boundary Scan (JTAG) Timing Diagram TCK (Input) VM VM VIH VIL SJ1 SJ2 SJ2 SJ3 SJ3 TCK (Input) Data Inputs Data Outputs Data Outputs Data Outputs VIH VIL Input Data Valid Output Data Valid Output Data Valid SJ4 SJ5 SJ6 SJ7 SJ6 |
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