PCIMX515CJM6C datasheet(120/184 Pages) FREESCALE

120 / 184 page

i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 1

120

Freescale Semiconductor

Preliminary—Subject to Change Without Notice

Electrical Characteristics

3.7.14

SPDIF Timing Parameters

Table 87 shows the timing parameters for the Sony/Philips Digital Interconnect Format (SPDIF).

3.7.15

SSI Timing Parameters

This section describes the timing parameters of the SSI module. The connectivity of the serial synchronous

interfaces is summarized in Table 88.

SJ9

TMS, TDI data hold time

—

SJ10

TCK low to TDO data valid

—

SJ11

TCK low to TDO high impedance

—

SJ12

TRST assert time

100

—

SJ13

TRST set-up time to TCK low

—

1 T

DC = target frequency of SJC

2 V

M = mid-point voltage

Table 87. SPDIF Timing

Characteristics

Symbol

All Frequencies

Unit

Min

Max

SPDIFOUT output (load = 50 pF)

•Skew

• Transition rising

• Transition falling

——

—

1.5

24.2

31.3

SPDIFOUT output (load = 30 pF)

•Skew

• Transition rising

• Transition falling

——

—

1.5

13.6

18.0

Table 88. AUDMUX Port Allocation

Port

Signal Nomenclature

Type and Access

AUDMUX port 1

SSI 1

Internal

AUDMUX port 2

SSI 2

Internal

AUDMUX port 3

AUD3

External – AUD3 I/O

AUDMUX port 4

AUD4

External – EIM or CSPI1 I/O via IOMUX

AUDMUX port 5

AUD5

External – EIM or SD1 I/O via IOMUX

Table 86. JTAG Timing (continued)

Parameter1,2

All Frequencies

Unit

Min

Max

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