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LTC4100

4100fb

APPLICATIONS INFORMATION

The MOSFET power dissipations at maximum output

current are given by:

PMAIN = VOUT/VIN(IMAX)2(1 + δΔT)RDS(ON)

+ k(VIN)2(IMAX)(CRSS)(fOSC)

PSYNC = (VIN – VOUT)/VIN(IMAX)2(1 + δΔT)RDS(ON)

where

δΔT is the temperature dependency of RDS(ON) and

k is a constant inversely related to the gate drive current.

Both MOSFETs have I2R losses while the PMAIN equation

includes an additional term for transition losses, which

are highest at high input voltages. For VIN < 20V the high

current efﬁciency generally improves with larger MOSFETs,

while for VIN > 20V the transition losses rapidly increase to

the point that the use of a higher RDS(ON) device with lower

CRSS actually provides higher efﬁciency. The synchronous

MOSFET losses are greatest at high input voltage or during

a short circuit when the duty cycle in this switch in nearly

100%. The term (1 +

δΔT) is generally given for a MOSFET

in the form of a normalized RDS(ON) vs temperature curve,

but

δ = 0.005/°C can be used as an approximation for low

voltage MOSFETs. CRSS = QGD/ΔVDS is usually speciﬁed

in the MOSFET characteristics. The constant k = 2 can be

used to estimate the contributions of the two terms in the

main switch dissipation equation.

If the charger is to operate in low dropout mode or with

a high duty cycle greater than 85%, then the topside

P-channel efﬁciency generally improves with a larger

MOSFET. Using asymmetrical MOSFETs may achieve cost

savings or efﬁciency gains.

The Schottky diode D1, shown in the typical application

on the back page, conducts during the dead-time between

the conduction of the two power MOSFETs. This prevents

the body diode of the bottom MOSFET from turning on and

storing charge during the dead-time, which could cost as

much as 1% in efﬁciency. A 1A Schottky is generally a good

size for 4A regulators due to the relatively small average

current. Larger diodes can result in additional transition

losses due to their larger junction capacitance.

The diode may be omitted if the efﬁciency loss can be

tolerated.

Calculating IC Power Dissipation

The power dissipation of the LTC4100 is dependent upon

the gate charge of the top and bottom MOSFETs (Q2 &

Q3 respectively) The gate charge (QG) is determined from

the manufacturer’s data sheet and is dependent upon both

the gate voltage swing and the drain voltage swing of the

MOSFET. Use 6V for the gate voltage swing and VDCIN for

the drain voltage swing.

PD = VDCIN • (fOSC (QGQ2 + QGQ3) + IDCIN) + VDD • IDD

Example: VDCIN = 19V, fOSC = 345kHz, QGQ2 = 25nC,

QGQ3 = 15nC, IDCIN = 5mA, VDD = 5.5V,

IDD = 1mA.

PD = 428mW

Calculating VDD Current

The LTC4100 VDD current, or IDD, consist of three parts:

a. IRUN = Current due to active clocking and bias inside

the IC.

b. ITHRM = Current due to thermistor circuit activity.

c. IACCEL = Current due to SMBus acceleration activity.

IDD = IRUN + ITHRM + IACCEL

a) IRUN current is basically independent of SCL clock rate.

Once the LTC4100 determines that there is activity on

the SMBus, it turns on its internal HF oscillator. This

HF oscillator remains on until a stop event occurs or

SDA and SCL are at logic level 1 for the SMBus timeout

period. Then it shuts off the HF oscillator. Thus, the

length of the transmission and the rate of transmission

bursts are more important in determining how much

current the LTC4100 burns, rather than the SCL rate.

In the equation below, IQ is the static current the IC

consumes as a function of the VDD voltage when not

active. Since it is hard to quantify the actual messages

going down the SMBus, one must estimate the SMBus

activity level in term of bus utilization per second.

IRUN = Message Duty Cycle • 950μA

+ (1 – Message Duty Cycle) • IQ

where IQ (typical) = VDD/47.2k

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