AT90SCR100 datasheet(248/433 Pages) ATMEL

248 / 433 page

248

TPR0327AY–SMS–30Jan09

AT90SCR100

nine data bits, then the ninth bit (RXB8n) is used for identifying address and data frames. When

the frame type bit (the first stop or the ninth bit) is one, the frame contains an address. When the

frame type bit is zero the frame is a data frame.

The Multi-processor Communication mode enables several slave MCUs to receive data from a

master MCU. This is done by first decoding an address frame to find out which MCU has been

addressed. If a particular slave MCU has been addressed, it will receive the following data

frames as normal, while the other slave MCUs will ignore the received frames until another

address frame is received.

18.10.1

Using MPCM0

For an MCU to act as a master MCU, it can use a 9-bit character frame format (UCSZ0 = 7). The

ninth bit (TXB80) must be set when an address frame (TXB80 = 1) or cleared when a data frame

(TXB = 0) is being transmitted. The slave MCUs must in this case be set to use a 9-bit character

frame format.

The following procedure should be used to exchange data in Multi-processor Communication

mode:

1. All Slave MCUs are in Multi-processor Communication mode (MPCM0 in UCSR0A is

set).

2. The Master MCU sends an address frame, and all slaves receive and read this frame.

In the Slave MCUs, the RXC0 Flag in UCSR0A will be set as normal.

3. Each Slave MCU reads the UDR0 Register and determines if it has been selected. If

so, it clears the MPCM0 bit in UCSR0A, otherwise it waits for the next address byte and

keeps the MPCM0 setting.

4. The addressed MCU will receive all data frames until a new address frame is received.

The other Slave MCUs, which still have the MPCM0 bit set, will ignore the data frames.

5. When the last data frame is received by the addressed MCU, the addressed MCU sets

the MPCM0 bit and waits for a new address frame from master. The process then

repeats from 2.

Using any of the 5- to 8-bit character frame formats is possible, but impractical since the

Receiver must change between using n and n+1 character frame formats. This makes full-

duplex operation difficult since the Transmitter and Receiver uses the same character size set-

ting. If 5- to 8-bit character frames are used, the Transmitter must be set to use two stop bit

(USBS0 = 1) since the first stop bit is used for indicating the frame type.

Do not use Read-Modify-Write instructions (SBI and CBI) to set or clear the MPCM0 bit. The

MPCM0 bit shares the same I/O location as the TXC0 Flag and this might accidentally be

cleared when using SBI or CBI instructions.

AT90SCR100 Datasheet(PDF) 248 Page - ATMEL Corporation