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AT90SCR100 Datasheet(PDF) 267 Page - ATMEL Corporation |
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AT90SCR100 Datasheet(HTML) 267 Page - ATMEL Corporation |
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267 / 433 page  267 TPR0327AY–SMS–30Jan09 AT90SCR100 20. SPI - Serial Peripheral Interface The Serial Peripheral Interface (SPI) allows synchronous data transfer between the AT90SCR100 and peripheral devices such as RF front-end chip. The AT90SCR100 SPI includes the following features: 20.1 Features • Full-duplex, Three-wire Synchronous Data Transfer • Master or Slave Operation • LSB First or MSB First Data Transfer • Seven Programmable Bit Rates • End of Transmission Interrupt Flag • Write Collision Flag Protection • Wake-up from Idle Mode • Double Speed (CK/2) Master SPI Mode 20.2 Description USART can also be used in Master SPI mode. See “USART in SPI Mode” on page 257. The Power Reduction SPI bit, PRSPI, in “PRR0 – Power Reduction Register 0” on page 45 on page 50 must be written to zero to enable SPI module. Please Refer to Section 2. “Pin List Configuration” on page 5 for SPI pin placement. Figure 20-1. SPI Block Diagram DIVIDER /2/4/8/16/32/64/128 Clk IO |
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