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AT90SCR100 Datasheet(PDF) 336 Page - ATMEL Corporation |
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AT90SCR100 Datasheet(HTML) 336 Page - ATMEL Corporation |
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336 / 433 page  336 TPR0327AY–SMS–30Jan09 AT90SCR100 24.3 Random Number Generator Registers 24.3.1 RNGCR - Random Number Generator Control Register • Bit 7..1 : Reserved for Future Use These bits are reserved for future use. • Bit 0 - ROSCE: Random Oscillator Enable Set this bit to enable the oscillator source and to start the Random Number Generation. Clear this bit to stop the execution of the Random Number Generator. The value of the LFSRn and RDWDR registers will retain the value of the last oscillator step. 24.3.2 LFSR0 to LFSR3 - Initialization Registers • Bit 31..0 - LFSDxx: Current LFSR Generator Value These registers can be loaded, with an initial seed value for the hardware process, if the PMCR.ROSCE bit is cleared. The values of LFSRx registers are changed between two AVR clock cycles. Bit 7654 3 2 1 0 $000095 ----- - - ROSCE RNGCR Read/write RRRRR R R R/W Initial value 0000 0 0 0 0 0x00 Bit 7654 3 2 1 0 $000094 LFSD [31..24] LFSR3 Read/write R/W R/W R/W R/W R/W R/W R/W R/W Initial value x x x x x x x x Bit 7654 3 2 1 0 $000093 LFSD [23..16] LFSR2 Read/write R/W R/W R/W R/W R/W R/W R/W R/W Initial value x x x x x x x x Bit 7654 3 2 1 0 $000092 LFSD [15..8] LFSR1 Read/write R/W R/W R/W R/W R/W R/W R/W R/W Initial value x x x x x x x x Bit 7654 3 2 1 0 $000091 LFSD [7..0] LFSR0 Read/write R/W R/W R/W R/W R/W R/W R/W R/W Initial value x x x x x x x x |
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