LTC2499CUHFPBF datasheet(13/34 Pages) LINER

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LTC2499

2499fc

CONVERTER OPERATION

Converter Operation Cycle

The LTC2499 is a multichannel, low power, delta-sigma

analog-to-digital converter with a 2-wire, I2C interface.

Its operation is made up of four states (see Figure 1).

The converter operating cycle begins with the conver-

sion, followed by the sleep state and ends with the data

input/output cycle .

Initially, at power-up, the LTC2499 performs a conversion.

Once the conversion is complete, the device enters the

sleep state. While in the sleep state, power consumption is

reduced by two orders of magnitude. The part remains in

the sleep state as long it is not addressed for a read/write

operation. The conversion result is held indeﬁnitely in a

static shift register while the part is in the sleep state.

The device will not acknowledge an external request dur-

ing the conversion state. After a conversion is ﬁnished,

the device is ready to accept a read/write request. Once

the LTC2499 is addressed for a read operation, the device

begins outputting the conversion result under the control

of the serial clock (SCL). There is no latency in the conver-

sion result. The data output is 32 bits long and contains a

24-bit plus sign conversion result. Data is updated on the

falling edges of SCL allowing the user to reliably latch data

on the rising edge of SCL. A new conversion is initiated

by a stop condition following a valid write operation or an

incomplete read operation. The conversion automatically

begins at the conclusion of a complete read cycle (all 32

bits read out of the device).

Ease of Use

The LTC2499 data output has no latency, ﬁlter settling

delay, or redundant data associated with the conversion

cycle. There is a one-to-one correspondence between the

conversion and the output data. Therefore, multiplexing

multiple analog inputs is straightforward. Each conver-

sion, immediately following a newly selected input or

mode, is valid and accurate to the full speciﬁcations of

the device.

The LTC2499 automatically performs offset and full-scale

calibration every conversion cycle independent of the input

channel selected. This calibration is transparent to the user

APPLICATIONS INFORMATION

Figure 1. State Transition Table

and has no effect on the operation cycle described above.

The advantage of continuous calibration is extreme stability

of offset and full-scale readings with respect to time, supply

voltage variation, input channel and temperature drift.

Easy Drive Input Current Cancellation

The LTC2499 combines a high precision, delta-sigma ADC

with an automatic, differential, input current cancellation

front end. A proprietary front-end passive sampling network

transparently removes the differential input current. This

enables external RC networks and high impedance sen-

sors to directly interface to the LTC2499 without external

ampliﬁers. The remaining common mode input current

is eliminated by either balancing the differential input im-

pedances or setting the common mode input equal to the

common mode reference (see the Automatic Differential

Input Current Cancellation section). This unique architec-

ture does not require on-chip buffers, thereby enabling

signals to swing beyond ground and VCC. Moreover, the

CONVERSION

SLEEP

2499 F01

YES

ACKNOWLEDGE

YES

STOP

OR READ

32 BITS

DATA OUTPUT/INPUT

POWER-ON RESET

DEFAULT CONFIGURATION:

IN+ = CH0, IN– = CH1

50Hz/60Hz REJECTION

1x OUTPUT

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