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LTC2499CUHFPBF Datasheet(PDF) 21 Page - Linear Technology |
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LTC2499CUHFPBF Datasheet(HTML) 21 Page - Linear Technology |
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21 / 34 page  LTC2499 21 2499fc Initiating a New Conversion When the LTC2499 finishes a conversion, it automatically enters the sleep state. Once in the sleep state, the device is ready for a read operation. After the device acknowledges a read request, the device exits the sleep state and enters the data output state. The data output state concludes and the LTC2499 starts a new conversion once a Stop condi- tion is issued by the master or all 32 bits of data are read out of the device. During the data read cycle, a Stop command may be issued by the master controller in order to start a new conversion and abort the data transfer. This Stop command must be issued during the ninth clock cycle of a byte read when the bus is free (the ACK/NAK cycle). LTC2499 Address The LTC2499 has three address pins (CA0, CA1, CA2). Each may be tied high, low, or left floating enabling one of 27 possible addresses (see Table 5). In addition to the configurable addresses listed in Table 5, the LTC2499 also contains a global address (1110111) which may be used for synchronizing multiple LTC2499s or other LTC24XX delta-sigma I2C devices (see Synchronizing Multiple LTC2499s with a Global Address Call section). Operation Sequence The LTC2499 acts as a transmitter or receiver, as shown in Figure 6. The device may be programmed to perform several functions. These include input channel selection, measure the internal temperature, selecting the line fre- quency rejection (50Hz, 60Hz, or simultaneous 50Hz and 60Hz), and a 2x speed mode. Continuous Read In applications where the input channel/configuration does not need to change for each cycle, the conversion can be continuously performed and read without a write cycle (see Figure 7). The configuration/input channel remains unchanged from the last value written into the device. If the device has not been written to since power up, the configuration is set to the default value. At the end of a read operation, a new conversion automatically begins. At the conclusion of the conversion cycle, the next result Table 5. Address Assignment CA2 CA1 CA0 ADDRESS LOW LOW LOW 0010100 LOW LOW HIGH 0010110 LOW LOW FLOAT 0010101 LOW HIGH LOW 0100110 LOW HIGH HIGH 0110100 LOW HIGH FLOAT 0100111 LOW FLOAT LOW 0010111 LOW FLOAT HIGH 0100101 LOW FLOAT FLOAT 0100100 HIGH LOW LOW 1010110 HIGH LOW HIGH 1100100 HIGH LOW FLOAT 1010111 HIGH HIGH LOW 1110100 HIGH HIGH HIGH 1110110 HIGH HIGH FLOAT 1110101 HIGH FLOAT LOW 1100101 HIGH FLOAT HIGH 1100111 HIGH FLOAT FLOAT 1100110 FLOAT LOW LOW 0110101 FLOAT LOW HIGH 0110111 FLOAT LOW FLOAT 0110110 FLOAT HIGH LOW 1000111 FLOAT HIGH HIGH 1010101 FLOAT HIGH FLOAT 1010100 FLOAT FLOAT LOW 1000100 FLOAT FLOAT HIGH 1000110 FLOAT FLOAT FLOAT 1000101 may be read using the method described above. If the conversion cycle is not concluded and a valid address selects the device, the LTC2499 generates a NAK signal indicating the conversion cycle is in progress. Continuous Read/Write Once the conversion cycle is concluded, the LTC2499 can be written to and then read from using the Repeated Start (Sr) command. Figure 8 shows a cycle which begins with a data Write, a repeated Start, followed by a Read and concluded with a Stop command. The following conversion begins after all APPLICATIONS INFORMATION |
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