HT46R065V datasheet(41/72 Pages) HOLTEK

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HT46R065V

Rev. 1.00

October 20, 2009

I/O Interfacing

The Timer/Event Counter, when configured to run in the

event counter or pulse width capture mode, requires the

use of an external timer pin for its operation. As this pin is

a shared pin it must be configured correctly to ensure that

it is setup for use as a Timer/Event Counter input pin. This

is achieved by ensuring that the mode select bits in the

Timer/Event Counter control register, select either the

event counter or pulse width capture mode. Additionally

the corresponding Port Control Register bit must be set

high to ensure that the pin is setup as an input. Any

pull-high resistor connected to this pin will remain valid

even if the pin is used as a Timer/Event Counter input.

Programming Considerations

When configured to run in the timer mode, the internal

system clock is used as the timer clock source and is

therefore synchronised with the overall operation of the

microcontroller. In this mode when the appropriate timer

interrupt signal directing the program flow to the respec-

tive internal interrupt vector. For the pulse width capture

mode, the internal system clock is also used as the timer

clock source but the timer will only run when the correct

logic condition appears on the external timer input pin. As

this is an external event and not synchronised with the in-

ternal timer clock, the microcontroller will only see this ex-

ternal event when the next timer clock pulse arrives. As a

result, there may be small differences in measured val-

ues requiring programmers to take this into account dur-

ing programming. The same applies if the timer is

configured to be in the event counting mode, which again

is an external event and not synchronised with the inter-

nal system or timer clock.

When the Timer/Event Counter is read, or if data is writ-

ten to the preload register, the clock is inhibited to avoid

errors, however as this may result in a counting error, this

should be taken into account by the programmer. Care

must be taken to ensure that the timers are properly in-

itialised before using them for the first time. The associ-

ated timer enable bits in the interrupt control register must

be properly set otherwise the internal interrupt associated

with the timer will remain inactive. The edge select, timer

mode and clock source control bits in timer control regis-

ter must also be correctly set to ensure the timer is prop-

erly configured for the required application. It is also

important to ensure that an initial value is first loaded into

the timer registers before the timer is switched on; this is

because after power-on the initial values of the timer reg-

isters are unknown. After the timer has been initialised

the timer can be turned on and off by controlling the en-

able bit in the timer control register.

When the Timer/Event Counter overflows, its corre-

sponding interrupt request flag in the interrupt control

is enabled this will in turn generate an interrupt signal.

However irrespective of whether the interrupts are en-

abled or not, a Timer/Event Counter overflow will also

generate a wake-up signal if the device is in a

Power-down condition. This situation may occur if the

Timer/Event Counter is in the Event Counting Mode and

if the external signal continues to change state. In such

a case, the Timer/Event Counter will continue to count

these external events and if an overflow occurs the de-

vice will be woken up from its Power-down condition. To

prevent such a wake-up from occurring, the timer inter-

rupt request flag should first be set high before issuing

the

²HALT² instruction to enter the Sleep Mode.

HT46R065V Datasheet(PDF) 41 Page - Holtek Semiconductor Inc

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