DSPIC33FJ32GS608 datasheet(144/416 Pages) MICROCHIP

144 / 416 page

dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610

DS70591B-page 144

Preliminary

 2009 Microchip Technology Inc.

IEC2: INTERRUPT ENABLE CONTROL REGISTER 2

U-0

—

bit 15

bit 8

U-0

R/W-0

—

IC4IE

IC3IE

DMA3IE

C1IE(1)

C1RXIE(1)

SPI2IE

SPI2EIE

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-7

Unimplemented: Read as ‘0’

bit 6

IC4IE: Input Capture Channel 4 Interrupt Enable bit

1 = Interrupt request enabled

0 = Interrupt request not enabled

bit 5

IC3IE: Input Capture Channel 3 Interrupt Enable bit

1 = Interrupt request enabled

0 = Interrupt request not enabled

bit 4

DMA3IE: DMA Channel 3 Data Transfer Complete Interrupt Enable bit

1 = Interrupt request enabled

0 = Interrupt request has enabled

bit 3

C1IE: ECAN1 Event Interrupt Enable bit(1)

1 = Interrupt request enabled

0 = Interrupt request not enabled

bit 2

C1RXIE: ECAN1 Receive Data Ready Interrupt Enable bit(1)

1 = Interrupt request enabled

0 = Interrupt request not enabled

bit 1

SPI2IE: SPI2 Event Interrupt Enable bit

1 = Interrupt request enabled

0 = Interrupt request not enabled

bit 0

SPI2EIE: SPI2 Error Interrupt Enable bit

1 = Interrupt request enabled

0 = Interrupt request not enabled

Note 1: Interrupts disabled on devices without ECAN™ modules

dsPIC33FJ32GS608 Datasheet(PDF) 144 Page - Microchip Technology

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