DSPIC33FJ32GS608 datasheet(146/416 Pages) MICROCHIP

146 / 416 page

dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610

DS70591B-page 146

Preliminary

 2009 Microchip Technology Inc.

IEC4: INTERRUPT ENABLE CONTROL REGISTER 4

U-0

R/W-0

U-0

R/W-0

U-0

—

—QEI2IE

—

PSESMIE

—

bit 15

bit 8

U-0

R/W-0

U-0

R/W-0

U-0

—C1TXIE(1)

—

—U2EIE

U1EIE

—

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-12

Unimplemented: Read as ‘0’

bit 11

QEI2IE: QEI2 Event Interrupt Enable bit

1 = Interrupt request enabled

0 = Interrupt request not enabled

bit 10

Unimplemented: Read as ‘0’

bit 9

PSESMIE: PWM Special Event Secondary Match Error Interrupt Enable bit

1 = Interrupt request enabled

0 = Interrupt request not enabled

bit 8-7

Unimplemented: Read as ‘0’

bit 6

C1TXIE: ECAN1 Transmit Data Request Interrupt Enable bit(1)

1 = Interrupt request occurred

0 = Interrupt request not occurred

bit 5-3

Unimplemented: Read as ‘0’

bit 2

U2EIE: UART2 Error Interrupt Enable bit

1 = Interrupt request enabled

0 = Interrupt request not enabled

bit 1

U1EIE: UART1 Error Interrupt Enable bit

1 = Interrupt request enabled

0 = Interrupt request not enabled

bit 0

Unimplemented: Read as ‘0’

Note 1: Interrupts disabled on devices without ECAN™ modules.

dsPIC33FJ32GS608 Datasheet(PDF) 146 Page - Microchip Technology

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