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VG3617801CT Datasheet(PDF) 8 Page - Vanguard International Semiconductor |
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VG3617801CT Datasheet(HTML) 8 Page - Vanguard International Semiconductor |
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8 / 68 page  Document:1G5-0133 Rev.1 Page 8 VIS VG3617801CT 16Mb CMOS Synchronous Dynamic RAM 2.Truth Table 2.1 Command Truth Table 2.2 DQM Truth Table 2.3 CKE Truth Table H : High level, L : Low level X : high or Low level(Don’t care), V : Valid Data input FUNCTION Symbol CKE CS RAS CAS WE A11 A10 A9- A0 n-1 n Device deselect DESL H X H X X X X X X No operation NOP H X L H H H X X X Mode register set MRS H X L L L L L X V Bank activate ACT H X L L H H V V V Read READ H X L H L H V L V Read with auto precharge READA H X L H L H V H V Write WRIT H X L H L L V L V Write with auto precharge WRITA H X L H L L V H V Precharge select bank PRE H X L L H L V L X Precharge all banks PALL H X L L H L X H X Burst stop BST H X L H H L X X X Auto refresh (CBR) CBR H H L L L H X X X FUNCTION Symbol CKE DQM n-1 n-1 U L Data write/output enable ENB H X L Data mask/output disable MASK H X H Upper byte write enable/output enable ENBU H X L X Lower byte write enable/output enable ENBL H X X L Upper byte write inhibit/output disable MASKU H X H X Lower byte inhibit/output disable MASKL H X X H Current State Function Symbol CKE CS RAS CAS WE Add- ress n-1 n Activating Clock suspend mode entry H L X X X X X Any Clock suspend L L X X X X X Clock suspend Clock suspend mode exit L H X X X X X Idle CBR refresh command REF H H L L L H X Idle Self refresh entry SELF H L L L L H X Self refresh Self refresh exit L H L H H H X L H H X X X X Idle Power down entry H L X X X X X Power down Power down exit L H X X X X X |
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