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WM2331 Datasheet(PDF) 4 Page - Wolfson Microelectronics plc |
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WM2331 Datasheet(HTML) 4 Page - Wolfson Microelectronics plc |
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4 / 25 page  WM2331 Production Data WOLFSON MICROELECTRONICS LTD PD Rev 1.4 April 2001 4 ELECTRICAL CHARACTERISTICS Test Conditions: AVDD = DVDD = 3.0V, fCLK = 30MHz, 50% duty cycle, MODE = AVDD, REFTS = 2.5V, REFBS = 0.5V, PGA gain = 1.0, TA = TMIN to TMAX, unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT DC Accuracy Integral nonlinearity INL ±1.0 ±2.0 LSB Differential nonlinearity DNL ±0.3 ±1.0 LSB Offset error 0.4 2.0 % of FS Gain error 1.4 3.5 % of FS Missing codes No missing codes guaranteed Analogue Input Signal to AIN pin MODE = AGND REFBS REFTS MODE = AVDD / 2, VCMCS fixed VCMCS - VREF/2 VCMCS + VREF/2 V Input signal range for unity PGA gain (see Note 1) MODE = AVDD REFBS REFTS AIN voltage limits AGND AVDD V Switched input capacitance 1.2 pF Analogue input bandwidth -3dB amplitude 150 MHz DC leakage current ± Full-scale input ±100 µA Conversion Characteristics Conversion frequency fCLK 530 MHz Pipeline delay 3 cycles of CLK Aperture delay tA 4.0 ns Aperture jitter 2.0 ps rms Dynamic Performance fIN = 3.5MHz 8.2 9.0 Effective number of bits ENOB fIN = 15MHz 7.7 bits fIN = 3.5MHz 55 60 Spurious free dynamic range SFDR fIN = 15MHz 48 dB fIN = 3.5MHz -58 -54.7 Total harmonic distortion THD fIN = 15MHz -47 dB fIN = 3.5MHz 51.2 56 Signal to noise ratio SNR fIN = 15MHz 53 dB fIN = 3.5MHz 51.1 56 Signal to noise and distortion ratio SNDR fIN = 15MHz 48 dB PGA Gain range (linear scale) 0.5 4 V/V Gain step size (linear scale) 0.5 V/V Gain error from nominal 3% Clamp Clamp DAC resolution 10 bits Clamp DAC output voltage REFBF REFTF V Clamp DAC DNL -1 1 LSB Clamp DAC DNL ±1 LSB External clamp reference on CLAMPIN 0.1 AVDD - 0.1 V Clamp output voltage error -40 40 mV |
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