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74LVC1G99GD Datasheet(PDF) 16 Page - NXP Semiconductors |
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74LVC1G99GD Datasheet(HTML) 16 Page - NXP Semiconductors |
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16 / 29 page ![]() 74LVC1G99_4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 16 April 2010 16 of 29 NXP Semiconductors 74LVC1G99 Ultra-configurable multiple function gate; 3-state [1] All typical values are measured at nominal VCC. [2] tpd is the same as tPLH and tPHL. [3] ten is the same as tPZH and tPZL. [4] tdis is the same as tPHZ and tPLZ. [5] CPD is used to determine the dynamic power dissipation (PD in μW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(C L × VCC 2 × f o) = sum of the outputs. ten enable time OE to Y; see Figure 22 [3] VCC = 1.65 V to 1.95 V - 5.7 - 2.0 25.2 32.0 ns VCC = 2.3 V to 2.7 V - 3.8 - 1.4 11.3 14.0 ns VCC = 2.7 V - 4.2 - 1.4 8.6 11.0 ns VCC = 3.0 V to 3.6 V - 3.5 - 1.4 7.0 9.0 ns VCC = 4.5 V to 5.5 V - 2.7 - 1.4 4.7 6.0 ns tdis disable time OE to Y; see Figure 22 [4] VCC = 1.65 V to 1.95 V - 5.7 - 3.0 15.0 19.0 ns VCC = 2.3 V to 2.7 V - 3.6 - 2.0 5.8 7.3 ns VCC = 2.7 V - 4.5 - 2.0 6.6 8.2 ns VCC = 3.0 V to 3.6 V - 4.5 - 2.1 5.9 7.4 ns VCC = 4.5 V to 5.5 V - 3.4 - 1.0 4.5 5.6 ns CPD power dissipation capacitance per buffer (output enabled); fi = 10 MHz; CL = 50 pF; VI = GND to VCC [5] VCC = 1.65 V to 1.95 V - 14 - - - - pF VCC = 2.3 V to 2.7 V - 16 - - - - pF VCC = 2.7 V - 18 - - - - pF VCC = 3.0 V to 3.6 V - 25 - - - - pF VCC = 4.5 V to 5.5 V - 30 - - - - pF Table 24. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V; for test circuit see Figure 23. Symbol Parameter Conditions 25 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max (85 °C) Max (125 °C) |
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