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LPC2194 Datasheet(PDF) 13 Page - NXP Semiconductors |
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LPC2194 Datasheet(HTML) 13 Page - NXP Semiconductors |
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13 / 40 page ![]() LPC2194_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 10 December 2007 13 of 40 NXP Semiconductors LPC2194 Single-chip 16/32-bit microcontroller [1] SSP interface available on LPC2194/01 only. 6.6 Pin connect block The pin connect block allows selected pins of the microcontroller to have more than one function. Configuration registers control the multiplexers to allow connection between the pin and the on chip peripherals. Peripherals should be connected to the appropriate pins prior to being activated, and prior to any related interrupt(s) being enabled. Activity of any enabled peripheral function that is not mapped to a related pin should be considered undefined. 6.7 General purpose parallel I/O (GPIO) and Fast I/O Device pins that are not connected to a specific peripheral function are controlled by the parallel I/O registers. Pins may be dynamically configured as inputs or outputs. Separate registers allow setting or clearing any number of outputs simultaneously. The value of the output register may be read back, as well as the current state of the port pins. 6.7.1 Features • Bit-level set and clear registers allow a single instruction set or clear of any number of bits in one port. • Direction control of individual bits. • Separate control of output set and clear. • All I/O default to inputs after reset. 6.7.2 Features added with the Fast GPIO set of registers available on LPC2194/01 only • Fast GPIO registers are relocated to the ARM local bus for the fastest possible I/O timing, enabling port pin toggling up to 3.5 times faster than earlier LPC2000 devices. • Mask registers allow treating sets of port bits as a group, leaving other bits unchanged. • All GPIO registers are byte addressable. • Entire port value can be written in one instruction. System Control External Interrupt 0 (EINT0) 14 External Interrupt 1 (EINT1) 15 External Interrupt 2 (EINT2) 16 External Interrupt 3 (EINT3) 17 ADC A/D Converter 18 CAN 1 ORed CAN Acceptance Filter 19 CAN1 (Tx int, Rx int) 20,21 CAN2 (Tx int, Rx int) 22,23 CAN3 (Tx int, Rx int) 24,25 CAN4 (Tx int, Rx int) 26,27 Table 3. Interrupt sources …continued Block Flag(s) VIC channel # |
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