P89LPC913FDH datasheet(29/66 Pages) NXP

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P89LPC912_913_914_5

Product data sheet

Rev. 05 — 28 September 2007

29 of 66

NXP Semiconductors

P89LPC912/913/914

8-bit microcontrollers with two-clock 80C51 core

8.3.6 Clock output (P89LPC912, P89LPC913)

The P89LPC912 supports a user selectable clock output function on the XTAL2/CLKOUT

pin when crystal oscillator is not being used. This condition occurs if another clock source

has been selected (on-chip RC oscillator, watchdog oscillator, external clock input on X1)

and if the Real-Time clock is not using the crystal oscillator as its clock source. This allows

external devices to synchronize to the P89LPC912. This output is enabled by the ENCLK

bit in the TRIM register. The frequency of this clock output is 1

⁄

2 that of the CCLK. If the

clock output is not needed in Idle mode, it may be turned off prior to entering Idle, saving

additional power.

8.4 On-chip RC oscillator option

The P89LPC912/913/914 has a 6-bit TRIM register that can be used to tune the

frequency of the RC oscillator. During reset, the TRIM value is initialized to a factory

preprogrammed value to adjust the oscillator frequency to 7.373 MHz,

± 1 % at room

temperature. End-user applications can write to the TRIM register to adjust the on-chip

RC oscillator to other frequencies.

8.5 Watchdog oscillator option

The watchdog has a separate oscillator which has a frequency of 400 kHz. This oscillator

can be used to save power when a high clock frequency is not needed.

8.6 External clock input option (P89LPC912, P89LPC913)

In this conﬁguration, the processor clock is derived from an external source driving the

XTAL1/P3.1 pin. The rate may be from 0 Hz up to 12 MHz. The XTAL2/P3.0 pin may be

used as a standard port pin or a clock output. When using an oscillator frequency

above 12 MHz, the reset input function of P1.5 must be enabled. An external circuit

is required to hold the device in reset at power-up until VDD has reached its

speciﬁed level. When system power is removed, VDD will fall below the minimum

speciﬁed operating voltage. When using an oscillator frequency above 12 MHz, in

some applications, an external brownout detect circuit may be required to hold the

device in reset when VDD falls below the minimum speciﬁed operating voltage.

P89LPC913FDH Datasheet(PDF) 29 Page - NXP Semiconductors