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P89V52X2FN Datasheet(PDF) 35 Page - NXP Semiconductors

Part # P89V52X2FN
Description  8-bit 80C51 low power 8 kB flash microcontroller with 256 B RAM, 192 B data EEPROM
PDF  57 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

P89V52X2FN Datasheet(HTML) 35 Page - NXP Semiconductors

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P89V52X2_3
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 4 May 2009
35 of 57
NXP Semiconductors
P89V52X2
80C51 with 256 B RAM, 192 B data EEPROM
• Map the data EEPROM into code memory space if not already mapped.
• Write the data EEPROM byte address into the DPTR.
• Use the MOVC instruction to read the data EEPROM.
6.13.5 Erasing a complete page (64 B)
A complete page can be erased by performing the following sequence:
• Map the data EEPROM into code memory space if not already mapped.
• Write the lower 8-bits of the data EEPROM page’s start address into FMADRL.
• Write the ERS_DP command (33H) to FMCON.
Once the ERS_DP command is written to FMCON, code execution will stall until the
operation is completed, approximately 6 ms.
6.13.6 Data EEPROM programming and erasing using the page register
In addition to page erase, a 64 B page register is included which allows from 1 B to 64 B
of a given page to be programmed or erase/programmed at the same time, substantially
reducing overall programming time. Two programming operations are provided:
• Program only operation. This operation used the PROG (48H) command and
programs the contents of the page register into the data EEPROM page. This
operation requires that the bytes being programmed have been previously erased.
This operation requires approximately 2 ms to complete.
• Erase and Program operation. This operation uses the EP (68H) command to both
erase and program the bytes previously loaded into the page register. This command
is often useful to erase and reprogram a single byte of data. This operation requires
approximately 4 ms to complete.
The page register consists of 64 B and an update flag for each byte. When a LOAD
command is issued to FMCON the page register contents and all of the update flags will
be cleared. When FMDATA is written, the value written to FMDATA will be stored in the
page register at the location specified by the lower 6 bits of FMADRL. In addition, the
update flag for that location will be set. FMADRL will auto-increment to the next location.
Auto-increment after writing to the last byte in the page register will ‘wrap-around’ to the
first byte in the page register, but will not affect FMADRL[7:6]. Bytes loaded into the page
register do not have to be continuous. Any byte location can be loaded into the page
register by changing the contents of FMADRL prior to writing to FMDATA. However, each
location in the page register can only be written once following each LOAD command.
Attempts to write to a page register location more than once should be avoided.
FMADRH and FMADRL[7:6] are used to specify a page in the code memory space. When
the PROG command is written to FMCON, the locations within the data EEPROM page
that correspond to updated locations in the page register will have their contents
programmed with the contents of their corresponding locations in the page register. Only
the bytes that were loaded into the page register will be programmed in the data EEPROM
array. Other bytes within the data EEPROM array will not be affected. The EP command
works similarly except that If the EP command is written, the corresponding bytes in the
data EEPROM will be erased prior to being programmed. This is often useful for erasing
and programming a small number of bytes or even a single byte.



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