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JS28F320J3D-75 Datasheet(PDF) 17 Page - Numonyx B.V

Part # JS28F320J3D-75
Description  Numonyx??Embedded Flash Memory (J3 v. D)
PDF  68 Pages
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Manufacturer  NUMONYX [Numonyx B.V]
Direct Link  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

JS28F320J3D-75 Datasheet(HTML) 17 Page - Numonyx B.V

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November 2007
Datasheet
308551-05
17
Numonyx™ Embedded Flash Memory (J3 v. D)
4.2
56-Lead TSOP Package Pinout (32/64/128 Mbit)
Notes:
1.
A22 exists on 64- and 128- densities. On 32-Mbit density this signal is a no-connect (NC).
2.
A23 exists on 128-Mbit densities. On 32- and 64-Mbit densities this signal is a no-connect (NC)
4.3
Signal Descriptions
Table 3 lists the active signals used on Numonyx™ Embedded Flash Memory (J3 v. D)
and provides a description of each.
Figure 8: 56-Lead TSOP Package Pinout (32/64/128 Mbit)
1
3
4
2
5
7
8
6
9
11
12
10
13
15
16
14
17
19
20
18
21
23
24
22
25
27
28
26
56
54
53
55
52
50
49
51
48
46
45
47
44
42
41
43
40
38
37
39
36
34
33
35
32
30
29
31
A
22
A
21
A
20
CE
1
A
19
A
17
A
16
A
18
V
CC
A
14
A
13
A
15
A
12
V
PEN
RP#
CE
0
A
11
A
9
A
8
A
10
GND
A
6
A
5
A
7
A
4
A
2
A
1
A
3
RFU
OE#
STS
WE#
DQ
15
DQ
14
DQ
6
DQ
7
GND
DQ
5
DQ
12
DQ
13
DQ
4
GND
DQ
11
V
CCQ
DQ
3
DQ
2
V
CC
DQ
10
DQ
9
DQ
8
DQ
0
DQ
1
A
0
A
23
CE
2
BYTE#
Intel® Embedded Flash Memory
(28FXXXJ3D)
56-Lead TSOP
Standard Pinout
14 mm x 20 mm
Top View
32/64/128 Mbit
Table 3:
Signal Descriptions for Numonyx™ Embedded Flash Memory (J3 v. D) (Sheet 1
of 2)
Symbol
Type
Name and Function
A0
Input
BYTE-SELECT ADDRESS: Selects between high and low byte when the device is in x8 mode. This
address is latched during a x8 program cycle. Not used in x16 mode (i.e., the A0 input buffer is
turned off when BYTE# is high).
A[MAX:1]
Input
ADDRESS INPUTS: Inputs for addresses during read and program operations. Addresses are
internally latched during a program cycle:
32-Mbit — A[21:1]
64-Mbit— A[22:1]
128-Mbit — A[23:1]
256-Mbit — A[24:1] A24 acts as a virtual CE for the two devices. A24 at VIL selects the lower die
and A24 at VIH selects the upper die.
D[7:0]
Input/
Output
LOW-BYTE DATA BUS: Inputs data during buffer writes and programming, and inputs commands
during CUI writes. Outputs array, CFI, identifier, or status data in the appropriate read mode. Data
is internally latched during write operations.



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