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PIC16F1826-E/ML Datasheet(PDF) 32 Page - Microchip Technology |
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PIC16F1826-E/ML Datasheet(HTML) 32 Page - Microchip Technology |
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32 / 406 page  PIC16F/LF1826/27 DS41391C-page 32 Preliminary 2010 Microchip Technology Inc. Bank 2 100h(2) INDF0 Addressing this location uses contents of FSR0H/FSR0L to address data memory (not a physical register) xxxx xxxx xxxx xxxx 101h(2) INDF1 Addressing this location uses contents of FSR1H/FSR1L to address data memory (not a physical register) xxxx xxxx xxxx xxxx 102h(2) PCL Program Counter (PC) Least Significant Byte 0000 0000 0000 0000 103h(2) STATUS — — —TO PD ZDC C ---1 1000 ---q quuu 104h(2) FSR0L Indirect Data Memory Address 0 Low Pointer 0000 0000 uuuu uuuu 105h(2) FSR0H Indirect Data Memory Address 0 High Pointer 0000 0000 0000 0000 106h(2) FSR1L Indirect Data Memory Address 1 Low Pointer 0000 0000 uuuu uuuu 107h(2) FSR1H Indirect Data Memory Address 1 High Pointer 0000 0000 0000 0000 108h(2) BSR — — — BSR4 BSR3 BSR2 BSR1 BSR0 ---0 0000 ---0 0000 109h(2) WREG Working Register 0000 0000 uuuu uuuu 10Ah(2) PCLATH — Write Buffer for the upper 7 bits of the Program Counter -000 0000 -000 0000 10Bh(2) INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 0000 000x 0000 000u 10Ch LATA LATA7 LATA6 — LATA4 LATA3 LATA2 LATA1 LATA0 xx-x xxxx uu-u uuuu 10Dh LATB LATB7 LATB6 LATB5 LATB4 LATB3 LATB2 LATB1 LATB0 xxxx xxxx uuuu uuuu 10Eh — Unimplemented — — 10Fh — Unimplemented — — 110h — Unimplemented — — 111h CM1CON0 C1ON C1OUT C1OE C1POL — C1SP C1HYS C1SYNC 0000 -100 0000 -100 112h CM1CON1 C1INTP C1INTN C1PCH1 C1PCH0 — — C1NCH1 C1NCH0 0000 --00 0000 --00 113h CM2CON0 C2ON C2OUT C2OE C2POL — C2SP C2HYS C2SYNC 0000 -100 0000 -100 114h CM2CON1 C2INTP C2INTN C2PCH1 C2PCH0 — — C2NCH1 C2NCH0 0000 --00 0000 --00 115h CMOUT — — — — — — MC2OUT MC1OUT ---- --00 ---- --00 116h BORCON SBOREN — — — — — — BORRDY 1--- ---q u--- ---u 117h FVRCON FVREN FVRRDY Reserved Reserved CDAFVR1 CDAFVR0 ADFVR1 ADFVR0 0qrr 0000 0qrr 0000 118h DACCON0 DACEN DACLPS DACOE — DACPSS1 DACPSS0 — DACNSS 000- 00-0 000- 00-0 119h DACCON1 — — — DACR4 DACR3 DACR2 DACR1 DACR0 ---0 0000 ---0 0000 11Ah SRCON0 SRLEN SRCLK2 SRCLK1 SRCLK0 SRQEN SRNQEN SRPS SRPR 0000 0000 0000 0000 11Bh SRCON1 SRSPE SRSCKE SRSC2E SRSC1E SRRPE SRRCKE SRRC2E SRRC1E 0000 0000 0000 0000 11Ch — Unimplemented — — 11Dh APFCON0 RXDTSEL SDO1SEL SS1SEL P2BSEL(1) CCP2SEL(1) P1DSEL P1CSEL CCP1SEL 0000 0000 0000 0000 11Eh APFCON1 — — — — — — — TXCKSEL ---- ---0 ---- ---0 11Fh — Unimplemented — — TABLE 3-8: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on: POR, BOR Value on all other Resets Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved. Shaded locations are unimplemented, read as ‘0’. Note 1: PIC16F/LF1827 only. 2: These registers can be addressed from any bank. |
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