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PIC16F1826-E/ML Datasheet(PDF) 37 Page - Microchip Technology |
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PIC16F1826-E/ML Datasheet(HTML) 37 Page - Microchip Technology |
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37 / 406 page  2010 Microchip Technology Inc. Preliminary DS41391C-page 37 PIC16F/LF1826/27 Bank 7 380h(2) INDF0 Addressing this location uses contents of FSR0H/FSR0L to address data memory (not a physical register) xxxx xxxx xxxx xxxx 381h(2) INDF1 Addressing this location uses contents of FSR1H/FSR1L to address data memory (not a physical register) xxxx xxxx xxxx xxxx 382h(2) PCL Program Counter (PC) Least Significant Byte 0000 0000 0000 0000 383h(2) STATUS — — —TO PD ZDC C ---1 1000 ---q quuu 384h(2) FSR0L Indirect Data Memory Address 0 Low Pointer 0000 0000 uuuu uuuu 385h(2) FSR0H Indirect Data Memory Address 0 High Pointer 0000 0000 0000 0000 386h(2) FSR1L Indirect Data Memory Address 1 Low Pointer 0000 0000 uuuu uuuu 387h(2) FSR1H Indirect Data Memory Address 1 High Pointer 0000 0000 0000 0000 388h(2) BSR — — — BSR4 BSR3 BSR2 BSR1 BSR0 ---0 0000 ---0 0000 389h(2) WREG Working Register 0000 0000 uuuu uuuu 38Ah(2) PCLATH — Write Buffer for the upper 7 bits of the Program Counter -000 0000 -000 0000 38Bh(2) INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 0000 000x 0000 000u 38Ch — Unimplemented — — 38Dh — Unimplemented — — 38Eh — Unimplemented — — 38Fh — Unimplemented — — 390h — Unimplemented — — 391h — Unimplemented — — 392h — Unimplemented — — 393h — Unimplemented — — 394h IOCBP IOCBP7 IOCBP6 IOCBP5 IOCBP4 IOCBP3 IOCBP2 IOCBP1 IOCBP0 0000 0000 0000 0000 395h IOCBN IOCBN7 IOCBN6 IOCBN5 IOCBN4 IOCBN3 IOCBN2 IOCBN1 IOCBN0 0000 0000 0000 0000 396h IOCBF IOCBF7 IOCBF6 IOCBF5 IOCBF4 IOCBF3 IOCBF2 IOCBF1 IOCBF0 0000 0000 0000 0000 397h — Unimplemented — — 398h — Unimplemented — — 399h — Unimplemented — — 39Ah CLKRCON CLKREN CLKROE CLKRSLR CLKRDC1 CLKRDC0 CLKRDIV2 CLKRDIV1 CLKRDIV0 0011 0000 0011 0000 39Bh — Unimplemented — — 39Ch MDCON MDEN MDOE MDSLR MDOPOL — — — MDBIT 0010 ---0 0010 ---0 39Dh MDSRC MDMSODIS — — — MDMS3 MDMS2 MDMS1 MDMS0 x--- xxxx u--- uuuu 39Eh MDCARL MDCLODIS MDCLPOL MDCLSYNC — MDCL3 MDCL2 MDCL1 MDCL0 xxx- xxxx uuu- uuuu 39Fh MDCARH MDCHODIS MDCHPOL MDCHSYNC — MDCH3 MDCH2 MDCH1 MDCH0 xxx- xxxx uuu- uuuu TABLE 3-8: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on: POR, BOR Value on all other Resets Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved. Shaded locations are unimplemented, read as ‘0’. Note 1: PIC16F/LF1827 only. 2: These registers can be addressed from any bank. |
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