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PIC18F23K20-E/ML Datasheet(PDF) 449 Page - Microchip Technology |
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PIC18F23K20-E/ML Datasheet(HTML) 449 Page - Microchip Technology |
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449 / 456 page  2010 Microchip Technology Inc. DS41303G-page 449 PIC18F2XK20/4XK20 LATE Register .......................................................... 133 PORTE Register ...................................................... 133 PSP Mode Select (PSPMODE Bit) .......................... 130 TRISE Register ........................................................ 133 Power Managed Modes ..................................................... 43 and A/D Operation ................................................... 269 and PWM Operation ................................................ 190 and SPI Operation ................................................... 201 Clock Transitions and Status Indicators ..................... 44 Effects on Clock Sources ........................................... 36 Entering ...................................................................... 43 Exiting Idle and Sleep Modes .................................... 48 by Interrupt ......................................................... 48 by Reset ............................................................. 48 by WDT Time-out ............................................... 48 Without a Start-up Delay .................................... 49 Idle Modes ................................................................. 45 PRI_IDLE ........................................................... 47 RC_IDLE ............................................................ 48 SEC_IDLE ......................................................... 47 Multiple Sleep Functions ............................................ 44 Run Modes ................................................................. 44 PRI_RUN ........................................................... 44 SEC_RUN .......................................................... 44 Selecting .................................................................... 43 Sleep Mode ................................................................ 45 Summary (table) ........................................................ 43 Power-on Reset (POR) ...................................................... 53 Power-up Timer (PWRT) ........................................... 55 Time-out Sequence .................................................... 55 Power-up Delays ................................................................ 36 Power-up Timer (PWRT) ................................................... 36 Prescaler, Timer0 ............................................................. 157 PRI_IDLE Mode ................................................................. 47 PRI_RUN Mode ................................................................. 44 Program Counter ............................................................... 66 PCL, PCH and PCU Registers ................................... 66 PCLATH and PCLATU Registers .............................. 66 Program Memory and Extended Instruction Set ..................................... 87 Code Protection ....................................................... 311 Instructions ................................................................. 70 Two-Word .......................................................... 70 Interrupt Vector .......................................................... 65 Look-up Tables .......................................................... 68 Map and Stack (diagram) ........................................... 65 Reset Vector .............................................................. 65 Program Verification and Code Protection ....................... 310 Associated Registers ............................................... 310 Programming, Device Instructions ................................... 315 PSP. See Parallel Slave Port. PSTRCON Register ......................................................... 187 Pulse Steering .................................................................. 187 PUSH ............................................................................... 344 PUSH and POP Instructions .............................................. 67 PUSHL ............................................................................. 360 PWM (CCP Module) Associated Registers ............................................... 153 PWM (ECCP Module) Effects of a Reset ..................................................... 190 Operation in Power Managed Modes ...................... 190 Operation with Fail-Safe Clock Monitor ................... 190 Pulse Steering .......................................................... 187 Steering Synchronization ......................................... 189 PWM Mode. See Enhanced Capture/Compare/PWM ..... 175 PWM1CON Register ........................................................ 186 R RAM. See Data Memory. RC_IDLE Mode .................................................................. 48 RCALL ............................................................................. 345 RCON Register .......................................................... 52, 118 Bit Status During Initialization .................................... 58 RCREG ............................................................................ 244 RCSTA Register .............................................................. 247 Reader Response ............................................................ 454 Register RCREG Register ..................................................... 253 Register File ....................................................................... 77 Register File Summary ................................................ 79–81 Registers ADCON0 (ADC Control 0) ....................................... 271 ADCON1 (ADC Control 1) ....................................... 272 ADCON2 (ADC Control 2) ....................................... 273 ADRESH (ADC Result High) with ADFM = 0) ......... 274 ADRESH (ADC Result High) with ADFM = 1) ......... 274 ADRESL (ADC Result Low) with ADFM = 0) ........... 274 ADRESL (ADC Result Low) with ADFM = 1) ........... 274 ANSEL (Analog Select 1) ........................................ 136 ANSEL (PORT Analog Control) ............................... 136 ANSELH (Analog Select 2) ...................................... 137 ANSELH (PORT Analog Control) ............................ 137 BAUDCON (Baud Rate Control) .............................. 248 BAUDCON (EUSART Baud Rate Control) .............. 248 CCP1CON (Enhanced Capture/Compare/PWM Control) ............................................................ 173 CCP2CON (Standard Capture/Compare/PWM Control) ............................................................ 143 CM1CON0 (C1 Control) .......................................... 284 CM2CON0 (C2 Control) .......................................... 285 CM2CON1 (C2 Control) .......................................... 287 CONFIG1H (Configuration 1 High) .......................... 301 CONFIG2H (Configuration 2 High) .......................... 302 CONFIG2L (Configuration 2 Low) ........................... 302 CONFIG3H (Configuration 3 High) .......................... 303 CONFIG4L (Configuration 4 Low) ........................... 303 CONFIG5H (Configuration 5 High) .......................... 304 CONFIG5L (Configuration 5 Low) ........................... 304 CONFIG6H (Configuration 6 High) .......................... 305 CONFIG6L (Configuration 6 Low) ........................... 305 CONFIG7H (Configuration 7 High) .......................... 306 CONFIG7L (Configuration 7 Low) ........................... 306 CVRCON (Comparator Voltage Reference Control CVRCON Register .............................. 291 CVRCON2 (Comparator Voltage Reference Control 2) CVRCON2 Register ........................ 292 DEVID1 (Device ID 1) .............................................. 307 DEVID2 (Device ID 2) .............................................. 307 ECCPAS (Enhanced CCP Auto-shutdown Control) ............................................................ 183 EECON1 (Data EEPROM Control 1) ................. 91, 100 HLVDCON (High/Low-Voltage Detect Control) ....... 293 INTCON (Interrupt Control) ..................................... 109 INTCON2 (Interrupt Control 2) ................................ 110 INTCON3 (Interrupt Control 3) ................................ 111 IPR1 (Peripheral Interrupt Priority 1) ....................... 116 IPR2 (Peripheral Interrupt Priority 2) ....................... 117 OSCCON (Oscillator Control) .................................... 29 OSCTUNE (Oscillator Tuning) ................................... 33 PIE1 (Peripheral Interrupt Enable 1) ....................... 114 PIE2 (Peripheral Interrupt Enable 2) ....................... 115 |
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