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PIC16F1934-E/ML Datasheet(PDF) 135 Page - Microchip Technology |
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PIC16F1934-E/ML Datasheet(HTML) 135 Page - Microchip Technology |
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135 / 418 page ![]() © 2008 Microchip Technology Inc. Preliminary DS41364A-page 133 PIC16F193X/LF193X TABLE 11-1: ADC CLOCK PERIOD (TAD) VS. DEVICE OPERATING FREQUENCIES FIGURE 11-2: ANALOG-TO-DIGITAL CONVERSION TAD CYCLES ADC Clock Period (TAD) Device Frequency (FOSC) Device Frequency (FOSC) ADC Clock Source ADCS<2:0> 32 MHz 20 MHz 16 MHz 8 MHz 4 MHz 1 MHz Fosc/2 000 62.5ns(2) 100 ns(2) 125 ns(2) 250 ns(2) 500 ns(2) 2.0 μs Fosc/4 100 125 ns(2) 200 ns(2) 250 ns(2) 500 ns(2) 1.0 μs4.0 μs Fosc/8 001 0.5 μs(2) 400 ns(2) 0.5 μs(2) 1.0 μs2.0 μs 8.0 μs(3) Fosc/16 101 800 ns 800 ns 1.0 μs2.0 μs4.0 μs 16.0 μs(3) Fosc/32 010 1.0 μs1.6 μs2.0 μs4.0 μs 8.0 μs(3) 32.0 μs(3) Fosc/64 110 2.0 μs3.2 μs4.0 μs 8.0 μs(3) 16.0 μs(3) 64.0 μs(3) FRC x11 1.0-6.0 μs(1,4) 1.0-6.0 μs(1,4) 1.0-6.0 μs(1,4) 1.0-6.0 μs(1,4) 1.0-6.0 μs(1,4) 1.0-6.0 μs(1,4) Legend: Shaded cells are outside of recommended range. Note 1: The FRC source has a typical TAD time of 1.6 μs for VDD. 2: These values violate the minimum required TAD time. 3: For faster conversion times, the selection of another clock source is recommended. 4: When the device frequency is greater than 1 MHz, the FRC clock source is only recommended if the conversion will be performed during Sleep. TAD1 TAD2 TAD3 TAD4 TAD5 TAD6 TAD7 TAD8 TAD11 Set GO bit Holding capacitor is disconnected from analog input (typically 100 ns) TAD9 TAD10 TCY - TAD ADRESH:ADRESL is loaded, GO bit is cleared, ADIF bit is set, holding capacitor is connected to analog input. Conversion starts b0 b9 b6 b5 b4 b3 b2 b1 b8 b7 On the following cycle: |
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